Blaise Tine
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ae7b01405c
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CI minor update
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2024-02-08 14:10:00 -08:00 |
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Blaise Tine
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d13c5f2986
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hw unit tests fixes
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2023-11-05 18:51:31 -08:00 |
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Blaise Tine
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d47cccc157
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Vortex 2.0 changes:
+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes
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2023-10-19 20:51:22 -07:00 |
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Blaise Tine
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a06812f93f
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minor updates
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2022-02-01 22:51:33 -05:00 |
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Blaise Tine
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d48f1c1c5f
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minor updates
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2022-02-01 06:53:31 -05:00 |
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Blaise Tine
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e3e2609f7e
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adding unit test for vx_malloc
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2022-01-30 05:57:18 -05:00 |
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Blaise Tine
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b741807f8c
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using ramulator dram simulator
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2021-12-06 01:22:45 -05:00 |
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Blaise Tine
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189cec3ca2
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minor update
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2021-12-01 10:36:50 -05:00 |
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Blaise Tine
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092ff42ab4
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simx multicore fix
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2021-12-01 00:12:16 -05:00 |
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Blaise Tine
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41d7e6c63a
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cummulative fixes, RTL uuid trace, texture unit fixes, simx timing fixes
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2021-11-30 07:08:15 -05:00 |
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Blaise Tine
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18762dffce
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fixes: texture unit mem access sometimes going to smem, bilinear texture filtering; new: cache req_id,
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2021-11-24 00:00:17 -05:00 |
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Blaise Tine
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67a76155b1
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minor update
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2021-10-19 01:46:36 -04:00 |
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Blaise Tine
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b529f538b8
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Makefile updates
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2021-10-17 10:52:07 -07:00 |
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Blaise Tine
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58a2140b92
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merge update
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2021-10-15 19:58:13 -07:00 |
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Blaise Tine
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e380ded5e1
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Merge branch 'master' into graphics
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2021-10-15 19:32:11 -07:00 |
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Blaise Tine
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549629440d
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minor update
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2021-10-11 17:11:36 -04:00 |
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Blaise Tine
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18c1dc2f0e
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fixed interface modports
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2021-09-28 02:42:04 -07:00 |
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Blaise Tine
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9f34b2944c
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code refactoring for Vivado, sv2v, and yosys compatibility
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2021-09-27 08:55:10 -04:00 |
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Blaise Tine
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0dfdf6cd4d
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-09-10 06:03:32 -04:00 |
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Blaise Tine
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18172fa611
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AXI memory bus support
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2021-09-10 01:36:01 -07:00 |
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Blaise Tine
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170c5d0c8a
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regression script update
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2021-09-08 23:22:50 -04:00 |
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Blaise Tine
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c06efbf480
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minor update
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2021-09-07 23:47:41 -07:00 |
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Blaise Tine
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53c8cddccf
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LKG build - minor update
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2021-08-30 10:25:52 -07:00 |
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Blaise Tine
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90b50277d0
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cache multi-porting fixes + optimization
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2021-08-29 18:33:49 -07:00 |
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Blaise Tine
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12b8b4af24
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minor updates
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2021-08-28 15:21:40 -07:00 |
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Blaise Tine
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cc259f60f6
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minor update
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2021-08-11 15:39:21 -07:00 |
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Blaise Tine
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90fa9eee7d
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minor update
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2021-08-08 18:35:05 -07:00 |
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Blaise Tine
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7b921387bc
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Merge branch 'master' into graphics
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2021-08-02 23:57:53 -07:00 |
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Blaise Tine
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91d4419fae
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new regression tests
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2021-08-02 16:05:33 -07:00 |
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Blaise Tine
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bb1ceffadd
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rebase master update
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2021-07-30 21:03:14 -07:00 |
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Blaise Tine
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6f0b5865e2
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minor update
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2021-07-25 02:35:34 -07:00 |
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Blaise Tine
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152d807301
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parallelizing continious integration
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2021-07-20 12:12:11 -07:00 |
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Blaise Tine
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5c40422e4f
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dcache response bus optimization
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2021-07-12 10:14:48 -07:00 |
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Blaise Tine
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d2f9c66840
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minor update
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2021-06-29 03:50:01 -07:00 |
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Blaise Tine
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e8c01e18d8
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regression fixes
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2021-06-29 04:32:32 -04:00 |
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Blaise Tine
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1ea738ed26
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lkg build
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2021-06-25 16:28:10 -07:00 |
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Blaise Tine
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2372067817
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minor update
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2021-06-22 09:30:36 -07:00 |
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Blaise Tine
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cadff791ab
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test layout fixes
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2021-06-13 17:59:06 -07:00 |
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Blaise Tine
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03406c0a3f
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project tests refactoring
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2021-06-13 17:42:04 -07:00 |
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Blaise Tine
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3071fb7a29
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adding support for non-cacheable memory addressing
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2021-06-06 13:35:55 -07:00 |
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Blaise Tine
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df7d91d690
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more testing
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2021-05-26 15:29:39 -07:00 |
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Blaise Tine
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9b120e3bb4
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minor update
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2021-05-24 20:05:36 -07:00 |
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Blaise Tine
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c81b1173b8
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minor update
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2021-05-24 18:20:46 -07:00 |
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Blaise Tine
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6107bf8247
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minor fix
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2021-05-04 11:05:07 -07:00 |
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Blaise Tine
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bac53e4ae1
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minor update
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2021-05-02 11:05:49 -07:00 |
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Blaise Tine
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d504adb236
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afu mem controller refactoring
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2021-05-01 08:39:52 -07:00 |
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Blaise Tine
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95f057bc2e
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fpga build refactoring
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2021-04-29 06:17:28 -07:00 |
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Blaise Tine
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8410c49f53
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code refactoring: DRAM => MEM renaming
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2021-04-26 00:58:48 -07:00 |
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Blaise Tine
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4cb98a25a7
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enabling 128-bit dram bus
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2021-04-24 00:31:27 -04:00 |
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Blaise Tine
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41413a51ba
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testing no-shared memory mode
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2021-04-01 12:37:40 -07:00 |
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