felsabbagh3
|
1e648c5819
|
FIxed first circular issue
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2019-10-24 10:38:04 -04:00 |
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felsabbagh3
|
1645a04b1d
|
Fixed SM + added def SYN
|
2019-10-22 15:56:30 -04:00 |
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felsabbagh3
|
9d8273afe4
|
Finished Cache Integration
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2019-10-22 06:02:08 -04:00 |
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felsabbagh3
|
b7af8c3f34
|
Integrated Shared Memory
|
2019-10-22 05:03:47 -04:00 |
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felsabbagh3
|
1bfafca896
|
Cleanup before integration
|
2019-10-22 03:03:17 -04:00 |
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felsabbagh3
|
b6375e76de
|
Readded IPDOM stack + SPLIT/Join tested
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2019-10-21 21:24:49 -04:00 |
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felsabbagh3
|
4cae140ac1
|
Mem technology compiling but still reading all zeros
|
2019-10-18 16:45:42 -04:00 |
|
felsabbagh3
|
f7d826593f
|
TMC working and tested
|
2019-10-18 16:09:06 -04:00 |
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felsabbagh3
|
6b729fd2ea
|
minor
|
2019-10-18 01:46:38 -04:00 |
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felsabbagh3
|
6779d0fade
|
Instruction Multiplex LSU/EXU 1 cycle DONE
|
2019-10-17 22:29:21 -04:00 |
|
felsabbagh3
|
95047fcadc
|
Rename Stage that removes the need for forwarding
|
2019-10-17 00:48:54 -04:00 |
|
felsabbagh3
|
8bc3b8b0a5
|
Need to link SystemC for sc_time_stamp()
|
2019-10-14 23:25:14 -04:00 |
|
felsabbagh3
|
ee83e6d8c8
|
Moved GPR to back-end
|
2019-10-14 19:08:32 -04:00 |
|
felsabbagh3
|
e67310acfb
|
New Warp Scheduler + VCD Enable
|
2019-09-15 00:12:41 -04:00 |
|
felsabbagh3
|
3c3a443bd5
|
New RF with Evaluation
|
2019-09-11 01:04:23 -04:00 |
|
felsabbagh3
|
8d143d7739
|
Quartus + GPR evaluation
|
2019-09-10 20:23:01 -04:00 |
|
felsabbagh3
|
ac9b06bf7d
|
Before FE BE abstraction
|
2019-09-08 16:21:37 -04:00 |
|
felsabbagh3
|
fe09aafbb4
|
Interface Checkpoint 2 - Remove Lints
|
2019-09-05 19:32:37 -04:00 |
|
Hyesoon Kim
|
6b3b124a30
|
fix typo of std=c++11
|
2019-06-12 07:32:20 -04:00 |
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felsabbagh3
|
9cd8ee8579
|
Added std=c++11
|
2019-06-11 23:21:48 -07:00 |
|
felsabbagh3
|
c83ef94d02
|
1 WARP 2 THREADS WORKING
|
2019-03-31 05:02:55 -04:00 |
|
felsabbagh3
|
cc0fb0eece
|
better use of valid signal
|
2019-03-27 00:07:59 -04:00 |
|
felsabbagh3
|
7a528c5ef2
|
Packing data wires + ALU module
|
2019-03-26 19:17:11 -04:00 |
|
felsabbagh3
|
01d142c6e6
|
rtl passing all tests
|
2019-03-22 02:44:53 -04:00 |
|
felsabbagh3
|
656475b3b3
|
Passing Most tests
|
2019-03-21 23:47:48 -04:00 |
|
felsabbagh3
|
d08d389177
|
Started on rtl (Finished till decode)
|
2019-03-21 02:23:10 -04:00 |
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