Commit Graph

14 Commits

Author SHA1 Message Date
Blaise Tine
5be1d85648 cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count 2020-11-02 01:50:12 -08:00
Blaise Tine
3fe31fc337 fixed afu to cpu mempcy hang 2020-10-28 14:19:13 -07:00
Blaise Tine
9a9f7955f0 basic test timing + scope tracing ccip 2020-10-27 17:04:04 -04:00
Blaise Tine
09b1c0eea7 minor update 2020-10-26 02:02:05 -07:00
Blaise Tine
43ae82e788 vlsim fix, verilator fst trace, use ram optimization 2020-10-25 16:40:50 -07:00
Blaise Tine
81dc8c7279 minor update 2020-10-20 16:47:01 -04:00
Blaise Tine
8290ad8828 minor update 2020-10-20 05:49:45 -07:00
Blaise Tine
7529f72c5d fixed OPAE crash, added custom bram module to controll rw collision, dogfood testcase argurment, optimzed buffered fifo, quartus build optimization flags 2020-10-20 05:32:55 -07:00
Blaise Tine
4bfc4ee78f scope fixes 2020-10-13 08:44:55 -07:00
Blaise Tine
32da50816f scope refactoring: adding modules definitions to VCD trace 2020-10-12 23:26:02 -04:00
Blaise Tine
309dd48fc6 scope bug fixes 2020-10-06 03:59:27 -04:00
Blaise Tine
4e1007e5b2 scope refactoring 2020-10-03 18:53:21 -04:00
Blaise Tine
f6f95e0c46 mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL 2020-09-19 14:45:42 -04:00
Blaise Tine
0fab1ddd92 adding support for verilator-driven AFU driver: vlsim 2020-09-08 13:05:26 -04:00