Santosh Raghav Srivatsan
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bde789b320
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Added support for RV32D and RV64D instructions
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2021-12-10 16:30:24 -05:00 |
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Santosh Raghav Srivatsan
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e6eda67d0c
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Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension
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2021-12-06 18:55:13 -05:00 |
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Santosh Raghav Srivatsan
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9cd8dec397
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Extended register file to 64 bits
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2021-11-08 17:54:16 -05:00 |
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Blaise Tine
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4a4498cd53
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minor update
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2021-10-11 18:32:17 -04:00 |
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Blaise Tine
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7102ca5394
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minor update
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2021-10-10 20:00:56 -04:00 |
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Blaise Tine
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b8682f56ac
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softfloat library integration
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2021-10-10 13:20:50 -07:00 |
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Blaise Tine
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28e26f3130
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minor update
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2021-10-09 13:19:46 -07:00 |
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Blaise Tine
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54bddeee9c
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simulation framework refactoring
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2021-10-09 10:20:42 -04:00 |
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