Commit Graph

13 Commits

Author SHA1 Message Date
Santosh Srivatsan
5edb9098ce Merge branch 'simx64' 2021-12-10 21:48:29 -05:00
Santosh Srivatsan
be499d6f38 Renamed simX to simx and added 64-bit riscv-tests 2021-12-10 16:56:12 -05:00
Santosh Raghav Srivatsan
bde789b320 Added support for RV32D and RV64D instructions 2021-12-10 16:30:24 -05:00
Santosh Raghav Srivatsan
e6eda67d0c Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension 2021-12-06 18:55:13 -05:00
Santosh Raghav Srivatsan
3784da0d2f riscv-tests work on simx 2021-12-01 19:41:16 -05:00
Blaise Tine
2a7a4df342 simx directory name fix 2021-11-30 07:17:58 -05:00
Santosh Raghav Srivatsan
28ab94e925 Added isa tests 2021-11-27 12:37:29 -05:00
Blaise Tine
b8682f56ac softfloat library integration 2021-10-10 13:20:50 -07:00
Blaise Tine
54bddeee9c simulation framework refactoring 2021-10-09 10:20:42 -04:00
Blaise Tine
12b8b4af24 minor updates 2021-08-28 15:21:40 -07:00
Blaise Tine
93fee18d59 minor update 2021-07-01 02:59:44 -07:00
Blaise Tine
e8c01e18d8 regression fixes 2021-06-29 04:32:32 -04:00
Blaise Tine
03406c0a3f project tests refactoring 2021-06-13 17:42:04 -07:00