Hansung Kim
62c7d1f4cf
Report any fire cycles from scoreboard as well
2024-03-29 12:23:15 -07:00
Hansung Kim
50263a5f7d
Rename sched_barrier_stalls -> perf_sched_barrier_idles
...
Sched stall by barrier is really idle because it causes !scheduler_if.valid,
which is counted as part of sched_idle.
2024-03-28 22:45:12 -07:00
joshua
d8f9359fae
test case update
2024-03-28 13:04:02 -07:00
joshua
08d7721e11
annoying swizzling problems
2024-03-28 03:00:15 -07:00
joshua
e16584ddd9
bleh still not work
2024-03-27 00:26:04 -07:00
Hansung Kim
dd90736382
Reformat perfcount report
2024-03-23 01:07:46 -07:00
Hansung Kim
3e6a9a6104
Expose scoreboard fires to perf interface
2024-03-23 01:06:40 -07:00
Hansung Kim
d99295793c
Periodically report perf counter; reformat operand/FU stalls
2024-03-23 00:02:02 -07:00
Hansung Kim
83e151a189
Add valid / fire / cycles-issued perf counters to dispatch
2024-03-23 00:01:15 -07:00
Hansung Kim
573be030c8
Add issue-stall-by-operand-hazard perf counters
...
Do the same reduce by + instead of OR fix for scoreboard counters.
2024-03-23 00:00:08 -07:00
Hansung Kim
dda67da84c
Add issue-stall-by-unit-busy perf counters
...
Add per-issue-width counters instead of using reduce "OR" and causing
undercounting.
2024-03-21 18:11:12 -07:00
Hansung Kim
3718a57937
Docs
2024-03-21 15:44:50 -07:00
joshua
b254281295
initial tcore impl
2024-03-21 01:29:38 -07:00
Hansung Kim
9438862389
Add perf counter for barrier schedule stalls
2024-03-20 15:29:28 -07:00
joshua
f9b4509936
initial tensor core
2024-03-20 02:46:00 -07:00
joshua
978dd3bdfe
seemingly working fp32 implementation
2024-03-19 17:56:59 -07:00
Hansung Kim
7014ae24da
Prettier perf count reports
2024-03-19 15:25:46 -07:00
Hansung Kim
b25deb8a2e
Fix assignment for perf counters
2024-03-19 14:06:44 -07:00
Hansung Kim
df4b21507e
Customize global barrier response logic for clusters
2024-03-18 14:30:32 -07:00
Hansung Kim
2525df9c5f
Use GBAR_CLUSTER_ENABLE to guard cluster-specific modification
2024-03-17 18:24:04 -07:00
Hansung Kim
7f8abe99ff
Fix wrong multicore parametrization in wrapper
2024-03-17 18:23:09 -07:00
Hansung Kim
40e2888733
Connect core gbar signals in wrapper
2024-03-17 14:09:43 -07:00
Hansung Kim
28f54bde7f
Merge remote-tracking branch 'sungwoong/master' into rtl
2024-03-14 09:15:59 -07:00
Hansung Kim
bd67ff3439
Fix creating bogus mem reqs when commit is stalled
...
When commit stage is stalled, LSU ready is deasserted for mem writes
since stores commit immediately; however, the same was not applied to
valid, creating duplicate memory write requests. Fix by guarding both
ready and valid properly.
2024-03-13 20:43:27 -07:00
Hansung Kim
8317a3fbe5
Fix fence by disallowing x-initialization instead of all-0 mask
...
Setting mem_req_mask to all-zero triggers an assertion error in
mem_scheduler. Instead, disallow initialize-by-x in instruction decode
which is the source of x-propagation. Since this seems to only happen
in VCS, define-gate it accordingly.
This reverts commit a15f4fd483
2024-03-07 17:39:18 -08:00
Hansung Kim
010c4675ce
Fix undeclared mem_perf_if
2024-03-07 15:00:43 -08:00
Hansung Kim
b63333a4ec
Merge remote-tracking branch 'upstream/master' into vortex2
2024-03-07 14:45:48 -08:00
joshua
beb3dce46d
integer reduction unit
2024-03-06 01:39:17 -08:00
Hansung Kim
e7b0a149c7
Print TAG_ONLY_WIDTH of req_tag in trace
...
... for use in trace parser. Full req_tag includes debug information
that complicates matching request to a corresponding request by tag.
2024-03-04 21:10:59 -08:00
Sungwoong Ha
3c2a266d37
second pass
2024-03-01 21:27:26 -08:00
Sungwoong Ha
a9709edae2
first pass
2024-03-01 21:05:52 -08:00
Sungwoong Ha
be7d87c82d
temp
2024-02-22 16:31:42 -08:00
Blaise Tine
5f2b10b8a6
minor update
2024-02-09 21:20:23 -08:00
Blaise Tine
3fee1a6193
minor update
2024-02-09 20:34:44 -08:00
Blaise Tine
ae7b01405c
CI minor update
2024-02-08 14:10:00 -08:00
Blaise Tine
be0db6e1a5
minor update
2024-02-04 20:32:05 -08:00
Blaise Tine
50028c1a33
Merge remote-tracking branch 'origin' into develop
2024-02-04 20:19:30 -08:00
Blaise Tine
8d4b6c804f
minor update
2024-02-04 20:17:12 -08:00
Blaise Tine
6f7a389a1f
arbiters unlock refactoring
2024-02-04 20:16:18 -08:00
Blaise Tine
fe15647f98
minor update
2024-02-04 02:11:53 -08:00
Blaise Tine
b0b7cd2b1e
minor updates
2024-02-03 19:09:53 -08:00
Hansung Kim
eb63767051
Don't hardcode SIMULATION
2024-02-01 23:58:06 -08:00
Hansung Kim
48558982f7
Merge remote-tracking branch 'upstream/master' into vortex2
2024-02-01 23:35:58 -08:00
Hansung Kim
a15f4fd483
[BUGFIX] Set mem_req_mask to 0 for fence
...
Fence instructions have address field set to X's which propagates to
cache_req_ready, causing issue stalls. Fix this by setting req_mask to all-zero
so that they can be handled unaffected by x-propagation.
Setting req_valid to 0 does not fix the problem because the LSU only commits
instructions when they have a matching response coming back.
2024-02-01 22:44:33 -08:00
Blaise Tine
f9cd8be19e
minor update
2024-01-31 13:35:43 -08:00
Blaise Tine
dab262e4f7
Merge branch 'develop' of https://github.com/vortexgpgpu/vortex into develop
2024-01-31 12:03:50 -08:00
Blaise Tine
8ab7c590fd
disabling fetch's deadlock check when L1 caches are present
2024-01-31 06:16:54 -08:00
Blaise Tine
e2d1387df8
elastic buffers classification
2024-01-31 00:39:37 -08:00
Shinnung Jeong
fd65ed95eb
fix bug to access memory address in simx
2024-01-30 20:45:47 -05:00
Blaise Tine
b31d868a27
Merge branch 'develop'
2024-01-28 17:34:46 -08:00
