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703a861fe9dd120753c587e86428ebab3a3320ab
vortex/hw/rtl
History
Blaise Tine 703a861fe9 added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
..
afu
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
cache
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
fp_cores
allowing partial cache request submissions, io bus support broken
2020-12-21 03:53:13 -08:00
interfaces
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
libs
allowing partial cache request submissions, io bus support broken
2020-12-21 03:53:13 -08:00
tex_unit
modelsim fixes && pipeline optimization
2020-07-28 14:20:23 -07:00
.DS_Store
project directories reorganization
2020-04-14 06:35:20 -04:00
.gitignore
fix opae build
2020-04-20 12:51:42 -07:00
Vortex.v
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_alu_unit.v
register file refactoring
2020-12-05 01:40:50 -08:00
VX_cluster.v
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_commit.v
register file refactoring
2020-12-05 01:40:50 -08:00
VX_config.vh
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_core.v
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_csr_arb.v
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_csr_data.v
adding new performance counters (banks utilization and DRAM bus utilization)
2020-12-22 12:33:45 -08:00
VX_csr_io_arb.v
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_csr_unit.v
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_databus_arb.v
allowing partial cache request submissions, io bus support broken
2020-12-21 03:53:13 -08:00
VX_decode.v
register file refactoring
2020-12-05 01:40:50 -08:00
VX_define.vh
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_execute.v
merging perf counters
2020-12-08 21:02:39 -08:00
VX_fetch.v
scope fixes
2020-10-13 08:44:55 -07:00
VX_fpu_unit.v
allowing partial cache request submissions, io bus support broken
2020-12-21 03:53:13 -08:00
VX_gpr_ram_f.v
fixed register file initialization to zero synthesis inference
2020-12-10 00:27:56 -08:00
VX_gpr_ram_i.v
fixed register file initialization to zero synthesis inference
2020-12-10 00:27:56 -08:00
VX_gpr_stage.v
fixed register file initialization to zero synthesis inference
2020-12-10 00:27:56 -08:00
VX_gpu_unit.v
performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
2020-12-19 02:45:06 -08:00
VX_ibuffer.v
performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
2020-12-19 02:45:06 -08:00
VX_icache_stage.v
performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
2020-12-19 02:45:06 -08:00
VX_instr_demux.v
fixed typo
2020-12-09 13:03:22 -08:00
VX_ipdom_stack.v
performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
2020-12-19 02:45:06 -08:00
VX_issue.v
adding new performance counters (banks utilization and DRAM bus utilization)
2020-12-22 12:33:45 -08:00
VX_lsu_unit.v
allowing partial cache request submissions, io bus support broken
2020-12-21 03:53:13 -08:00
VX_mem_arb.v
performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
2020-12-19 02:45:06 -08:00
VX_mem_unit.v
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_mul_unit.v
allowing partial cache request submissions, io bus support broken
2020-12-21 03:53:13 -08:00
VX_pipeline.v
added support for write-through cache, removed cache snooping support
2020-12-23 23:51:02 -08:00
VX_platform.vh
performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
2020-12-19 02:45:06 -08:00
VX_print_instr.vh
optimize warp_sched
2020-08-24 05:36:00 -07:00
VX_scope.vh
cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count
2020-11-02 01:50:12 -08:00
VX_scoreboard.v
register file refactoring
2020-12-05 01:40:50 -08:00
VX_types.vh
fixed register file initialization to zero synthesis inference
2020-12-10 00:27:56 -08:00
VX_warp_sched.v
performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
2020-12-19 02:45:06 -08:00
VX_writeback.v
performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
2020-12-19 02:45:06 -08:00