107 lines
3.0 KiB
C++
107 lines
3.0 KiB
C++
#include <iostream>
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#include <iomanip>
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#include <string>
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#include <sstream>
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#include <fstream>
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#include <stdlib.h>
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#include <sys/stat.h>
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#include "processor.h"
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#include "constants.h"
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#include <util.h>
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#include "args.h"
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using namespace vortex;
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int main(int argc, char **argv) {
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int exitcode = 0;
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std::string archStr("rv32imf");
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std::string imgFileName;
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int num_cores(NUM_CORES * NUM_CLUSTERS);
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int num_warps(NUM_WARPS);
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int num_threads(NUM_THREADS);
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bool showHelp(false);
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bool showStats(false);
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bool riscv_test(false);
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/* Read the command line arguments. */
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CommandLineArgFlag fh("-h", "--help", "", showHelp);
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CommandLineArgSetter<std::string> fa("-a", "--arch", "", archStr);
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CommandLineArgSetter<std::string> fi("-i", "--image", "", imgFileName);
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CommandLineArgSetter<int> fc("-c", "--cores", "", num_cores);
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CommandLineArgSetter<int> fw("-w", "--warps", "", num_warps);
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CommandLineArgSetter<int> ft("-t", "--threads", "", num_threads);
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CommandLineArgFlag fr("-r", "--riscv", "", riscv_test);
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CommandLineArgFlag fs("-s", "--stats", "", showStats);
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CommandLineArg::readArgs(argc - 1, argv + 1);
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if (showHelp || imgFileName.empty()) {
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std::cout << "Vortex emulator command line arguments:\n"
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" -i, --image <filename> Program RAM image\n"
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" -c, --cores <num> Number of cores\n"
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" -w, --warps <num> Number of warps\n"
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" -t, --threads <num> Number of threads\n"
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" -a, --arch <arch string> Architecture string\n"
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" -r, --riscv riscv test\n"
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" -s, --stats Print stats on exit.\n";
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return 0;
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}
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std::cout << "Running " << imgFileName << "..." << std::endl;
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if (!SimPlatform::instance().initialize())
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return -1;
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{
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RAM ram(RAM_PAGE_SIZE);
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{
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std::string program_ext(fileExtension(imgFileName.c_str()));
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if (program_ext == "bin") {
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ram.loadBinImage(imgFileName.c_str(), STARTUP_ADDR);
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} else if (program_ext == "hex") {
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ram.loadHexImage(imgFileName.c_str());
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} else {
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std::cout << "*** error: only *.bin or *.hex images supported." << std::endl;
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return -1;
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}
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}
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ArchDef arch(archStr, num_cores, num_warps, num_threads);
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auto processor = Processor::Create(arch);
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processor->attach_ram(&ram);
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// setup memory simulator
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auto memsim = MemSim::Create(MemSim::Config{
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DRAM_CHANNELS,
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arch.num_cores()
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});
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processor->MemReqPort.bind(&memsim->MemReqPort);
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memsim->MemRspPort.bind(&processor->MemRspPort);
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// run simulation
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for (;;) {
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SimPlatform::instance().step();
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if (processor->check_exit(&exitcode))
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break;
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};
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}
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SimPlatform::instance().finalize();
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if (riscv_test) {
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if (1 == exitcode) {
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std::cout << "Passed." << std::endl;
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exitcode = 0;
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} else {
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std::cout << "Failed." << std::endl;
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}
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} else {
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if (exitcode != 0) {
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std::cout << "*** error: exitcode=" << exitcode << std::endl;
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}
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}
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return exitcode;
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}
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