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Update docs/Simulation/Software-RTL-Simulation.rst

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Co-authored-by: Jerry Zhao <qwertyuiopghb@gmail.com>
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Jordan Lees
2023-11-03 23:56:51 -04:00
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docs/Simulation/Software-RTL-Simulation.rst
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@@ -84,7 +84,7 @@ For example:
Custom Benchmarks/Tests
-------------------------------
To compile your own code to run in a Verilator/VCS simulation, add it to Chipyard's ``tests`` directory then add its name to the list of ``PROGRAMS`` inside the ``Makefile``. Then when you run ``make``, all of the programs inside ``tests`` will output a ``.riscv`` binary, which can be used with the simulator as described above.
To compile your own bare-metal code to run in a Verilator/VCS simulation, add it to Chipyard's ``tests`` directory then add its name to the list of ``PROGRAMS`` inside the ``Makefile``. These binaries are compiled with the libgloss-htif library, which implements a minimal set of useful syscalls for bare-metal binaries. Then when you run ``make``, all of the programs inside ``tests`` will be compiled into ``.riscv`` ELF binaries, which can be used with the simulator as described above.
.. code-block:: shell