Merge pull request #314 from ucb-bar/master

`master` fixes into `dev`

.circleci/check-commit.sh

@@ -21,29 +21,72 @@ git config submodule.vlsi/hammer-synopsys-plugins.update none
 git submodule update --init
 status=$(git submodule status)
 
+all_names=()
+
 search () {
     for submodule in "${submodules[@]}"
     do
         echo "Running check on submodule $submodule in $dir"
-        hash=$(echo "$status" | grep $submodule | awk '{print$1}' | grep -o "[[:alnum:]]*")
-        echo "Searching for $hash in origin/master of $submodule"
-        git -C $dir/$submodule branch -r --contains "$hash" | grep "origin/master" # needs init'ed submodules
+        hash=$(echo "$status" | grep "$dir.*$submodule " | awk '{print$1}' | grep -o "[[:alnum:]]*")
+        echo "Searching for $hash in origin/$branch of $submodule"
+        (git -C $dir/$submodule branch -r --contains "$hash" | grep "origin/$branch") && true # needs init'ed submodules
+        all_names+=("$dir/$submodule $hash $?")
     done
 }
 
 submodules=("boom" "hwacha" "icenet" "rocket-chip" "sifive-blocks" "sifive-cache" "testchipip")
 dir="generators"
+branch="master"
 
 search
 
-submodules=("esp-tools" "riscv-tools")
-dir="toolchains"
+submodules=("riscv-gnu-toolchain" "riscv-isa-sim" "riscv-pk" "riscv-tests")
+dir="toolchains/esp-tools"
+branch="master"
+
+search
+
+
+submodules=("riscv-gnu-toolchain" "riscv-isa-sim" "riscv-pk" "riscv-tests" "riscv-gnu-toolchain-prebuilt")
+dir="toolchains/riscv-tools"
+branch="master"
+
+search
+
+# riscv-openocd doesn't use its master branch
+submodules=("riscv-openocd")
+dir="toolchains/riscv-tools"
+branch="riscv"
 
 search
 
 submodules=("barstools" "chisel3" "firrtl" "torture")
 dir="tools"
+branch="master"
 
 search
 
+submodules=("firesim")
+dir="sims"
+branch="master"
+
+search
+
+# turn off verbose printing to make this easier to read
+set +x
+
+# print all result strings
+for str in "${all_names[@]}";
+do
+    echo "$str"
+done
+
+# check if there was a non-zero return code
+for str in "${all_names[@]}";
+do
+    if [ ! 0 = $(echo "$str" | awk '{print$3}') ]; then
+        exit 1
+    fi
+done
+
 echo "Done checking all submodules"

.circleci/config.yml

@@ -346,35 +346,6 @@ jobs:
                 key: fireboom-{{ .Branch }}-{{ .Revision }}
                 paths:
                     - "/home/riscvuser/project"
-    prepare-firesim-clockdiv:
-        docker:
-            - image: riscvboom/riscvboom-images:0.0.12
-        environment:
-            JVM_OPTS: -Xmx3200m # Customize the JVM maximum heap limit
-            TERM: dumb
-        steps:
-            - add_ssh_keys:
-                fingerprints:
-                    - "3e:c3:02:5b:ed:64:8c:b7:b0:04:43:bc:83:43:73:1e"
-            - checkout
-            - run:
-                name: Create hash of toolchains
-                command: |
-                    .circleci/create-hash.sh
-            - restore_cache:
-                keys:
-                    - riscv-tools-installed-v2-{{ checksum "../riscv-tools.hash" }}
-            - restore_cache:
-                keys:
-                    - verilator-installed-v3-{{ checksum "sims/verilator/verilator.mk" }}
-            - run:
-                name: Building FireSim MIDAS simulator using Verilator
-                command: .circleci/do-firesim-build.sh firesim-clockdiv
-                no_output_timeout: 120m
-            - save_cache:
-                key: firesim-clockdiv-{{ .Branch }}-{{ .Revision }}
-                paths:
-                    - "/home/riscvuser/project"
     midasexamples-run-tests:
         docker:
             - image: riscvboom/riscvboom-images:0.0.12
@@ -571,33 +542,6 @@ jobs:
                 name: Run FireSim tests
                 command: .circleci/run-firesim-tests.sh fireboom
                 no_output_timeout: 20m
-    firesim-clockdiv-run-tests:
-        docker:
-            - image: riscvboom/riscvboom-images:0.0.12
-        environment:
-            JVM_OPTS: -Xmx3200m # Customize the JVM maximum heap limit
-            TERM: dumb
-        steps:
-            - checkout
-            - run:
-                name: Create hash of toolchains
-                command: |
-                    .circleci/create-hash.sh
-            - restore_cache:
-                keys:
-                    - riscv-tools-installed-v2-{{ checksum "../riscv-tools.hash" }}
-            - restore_cache:
-                keys:
-                    - firesim-clockdiv-{{ .Branch }}-{{ .Revision }}
-            - restore_cache:
-                keys:
-                    - extra-tests-{{ .Branch }}-{{ .Revision }}
-            - restore_cache:
-                keys:
-                    - verilator-installed-v3-{{ checksum "sims/verilator/verilator.mk" }}
-            - run:
-                name: Run FireSim tests
-                command: .circleci/run-firesim-tests.sh firesim-clockdiv
 
 
 # Order and dependencies of jobs to run
@@ -671,11 +615,6 @@ workflows:
                     - install-riscv-toolchain
                     - install-verilator
 
-            - prepare-firesim-clockdiv:
-                requires:
-                    - install-riscv-toolchain
-                    - install-verilator
-
             # Run the respective tests
 
             # Run midasexamples test
@@ -715,8 +654,3 @@ workflows:
                 requires:
                     - prepare-fireboom
                     - build-extra-tests
-
-            - firesim-clockdiv-run-tests:
-                requires:
-                    - prepare-firesim-clockdiv
-                    - build-extra-tests

.circleci/defaults.sh

@@ -49,4 +49,3 @@ mapping["blockdevrocketchip"]="SUB_PROJECT=example CONFIG=SimBlockDeviceRocketCo
 mapping["hwacha"]="SUB_PROJECT=example CONFIG=HwachaRocketConfig"
 mapping["firesim"]="DESIGN=FireSim TARGET_CONFIG=DDR3FRFCFSLLC4MB_FireSimRocketChipConfig PLATFORM_CONFIG=BaseF1Config"
 mapping["fireboom"]="DESIGN=FireSim TARGET_CONFIG=DDR3FRFCFSLLC4MB_FireSimBoomConfig PLATFORM_CONFIG=BaseF1Config"
-mapping["firesim-clockdiv"]="DESIGN=FireSim TARGET_CONFIG=DDR3FRFCFSLLC4MB3Div_FireSimRocketChipConfig PLATFORM_CONFIG=BaseF1Config"

generators/firechip/src/main/scala/TargetConfigs.scala

@@ -89,7 +89,6 @@ class WithScalaTestFeatures extends Config((site, here, up) => {
 // FASED Config Aliases. This to enable config generation via "_" concatenation
 // which requires that all config classes be defined in the same package
 class DDR3FRFCFSLLC4MB extends FRFCFS16GBQuadRankLLC4MB
-class DDR3FRFCFSLLC4MB3Div extends FRFCFS16GBQuadRankLLC4MB3Div
 
 // L2 Config Aliases. For use with "_" concatenation
 class L2SingleBank512K extends freechips.rocketchip.subsystem.WithInclusiveCache

scripts/init-submodules-no-riscv-tools.sh

@@ -50,7 +50,7 @@ git config --unset submodule.vlsi/hammer-synopsys-plugins.update
 git config --unset submodule.vlsi/hammer-mentor-plugins.update
 
 if [ $NO_FIRESIM = false ]; then
-echo "initializing firesim"
+  echo "initializing firesim"
   # Renable firesim and init only the required submodules to provide
   # all required scala deps, without doing a full build-setup
   git config --unset submodule.sims/firesim.update