Commit Graph

3402 Commits

Author SHA1 Message Date
abejgonzalez
06dad64cfc Always remove old repo for full flow CI 2023-05-24 09:49:12 -07:00
abejgonzalez
1363d82813 Update names | Fix find-config-frags 2023-05-24 09:22:49 -07:00
abejgonzalez
34263fe1a6 Serialize SBT calls 2023-05-18 15:31:39 -07:00
abejgonzalez
c4bb06b061 Revert SBT to 1.8.2 | Forcestart SBT 2023-05-18 10:25:16 -07:00
abejgonzalez
44a2eebad6 Fix SBT/JAVA_OPTS 2023-05-18 00:21:48 -07:00
abejgonzalez
6b3c8f9bf4 Bump CVA6 2023-05-18 00:14:49 -07:00
abejgonzalez
c729b6c844 Fix repo clean 2023-05-17 20:46:49 -07:00
abejgonzalez
30dfe0650d Fix common.mk 2023-05-17 18:23:45 -07:00
abejgonzalez
99aabf2460 Add backwards compat 2023-05-17 18:21:52 -07:00
abejgonzalez
ee4fe21cb9 Bump SBT 2023-05-17 18:18:15 -07:00
abejgonzalez
612ac12473 Cleanup CI 2023-05-17 18:15:32 -07:00
abejgonzalez
dbe352e9dc Merge remote-tracking branch 'origin/main' into use-fat-jar 2023-05-17 18:12:21 -07:00
Jerry Zhao
76cf492bdf Merge pull request #1467 from ucb-bar/jerryz123-patch-2
Generate objdump | check BINARY | cospike fixes
2023-05-17 16:07:11 -07:00
Jerry Zhao
abf2af16b4 Cospike should always include zicntr 2023-05-17 16:06:24 -07:00
Jerry Zhao
c2ca66ac4d Support ssip interrupts in spike-cosim 2023-05-17 15:21:11 -07:00
Jerry Zhao
4f33c2dddc Merge pull request #1479 from ucb-bar/embench
Add embench build support
2023-05-17 13:09:55 -07:00
Jerry Zhao
059f88a80d Add embench build support 2023-05-17 11:20:46 -07:00
Jerry Zhao
27f78da07b Merge pull request #1472 from ucb-bar/simpleclocks
Switch RTL sims to absolute clock-generators
2023-05-11 21:36:53 -07:00
Jerry Zhao
d673c61b8b Switch SpikeTile CI to SpikeConfig 2023-05-11 17:19:17 -07:00
Jerry Zhao
64ad77bbcf Make FPGA flows use the harnessClockInstantiator 2023-05-11 15:04:04 -07:00
Jerry Zhao
a9bc11accb Update comments on harnessbinders in AbstractConfig 2023-05-11 15:04:04 -07:00
Jerry Zhao
1a6b34696e Set a more realistic 500 MHz uncore clock: 2023-05-11 15:04:04 -07:00
Jerry Zhao
4dd017d181 Fix WithClockAndResetFromHarness to actually request harness clocks 2023-05-11 15:04:04 -07:00
Jerry Zhao
f4bf1b0a28 Fix multiclockrocketconfig 2023-05-11 15:04:04 -07:00
Jerry Zhao
624785376a Fix PassThroughClockGenerator to handle multiclock properly 2023-05-11 15:04:04 -07:00
Jerry Zhao
ffc4d1f662 Use getClass.getSimpleName for ClockSourceAtFreqMHz blackbox inline 2023-05-11 15:04:04 -07:00
Jerry Zhao
1916d3e4fc Add timeunit to ClockSourceAtFreqMHz 2023-05-11 15:04:04 -07:00
Jerry Zhao
bcd273986f Fix ClockSourceAtFreqMHz period calc 2023-05-11 15:04:03 -07:00
Jerry Zhao
5c8ea080ee Switch to our own ClockSourceAtFreq that is verilator-compatible 2023-05-11 15:04:03 -07:00
Jerry Zhao
71fe1ad858 Switch RTL sims to absolute clock-generators 2023-05-11 15:04:03 -07:00
Jerry Zhao
335a50d074 Merge pull request #1473 from ucb-bar/jerryz123-patch-1
Fix vcd/fst/fsdb waveform generation
2023-05-10 16:04:58 -07:00
Jerry Zhao
a0569208a5 Fix VCS waveforms 2023-05-10 15:49:59 -07:00
Jerry Zhao
ab6479641e Fix verilator vcd/fsdt file extension 2023-05-10 15:16:16 -07:00
Jerry Zhao
591c1d6500 Merge pull request #1464 from ucb-bar/optionals
Make BootAddrReg optional
2023-05-10 13:03:22 -07:00
Jerry Zhao
c148f1daf1 Make BootAddrReg optional 2023-05-10 11:44:03 -07:00
Jerry Zhao
7b8cb001ee Merge pull request #1465 from ucb-bar/renameserial
Rename SerialAdapter+SimSerial to TSIToTileLink/SimTSI/TSIHarness
2023-05-10 11:39:31 -07:00
Jerry Zhao
fbfb518b72 Merge remote-tracking branch 'origin/main' into renameserial 2023-05-10 11:39:11 -07:00
Sagar Karandikar
1c10f75622 Merge pull request #1471 from ucb-bar/lowmem-configs
Add 1GB / 4GB DRAM firechip configs for FireSim VCU118
2023-05-10 11:32:01 -07:00
Sagar Karandikar
abe8a7fb8b remove extra newlines 2023-05-10 11:31:05 -07:00
Abraham Gonzalez
f111e2d459 Merge pull request #1398 from ucb-bar/bump-verilator
Bump Verilator and use `TestDriver.v` as top
2023-05-10 09:10:34 -07:00
Jerry Zhao
20250731ea Merge pull request #1468 from ucb-bar/dramsim2bump 2023-05-09 21:33:44 -07:00
abejgonzalez
d3f148f1f4 Merge remote-tracking branch 'origin/main' into bump-verilator 2023-05-09 20:50:07 -07:00
Abraham Gonzalez
8fa12e38cf Merge pull request #1466 from ucb-bar/sync-params-n-script
Separate out conda-lock generation into new script
2023-05-09 20:41:31 -07:00
Jerry Zhao
8be6d42606 Bump DRAMSim2 to avoid verbose log files 2023-05-09 20:17:17 -07:00
Jerry Zhao
94f83e319a Fix bugs in spike-cosim 2023-05-09 17:39:48 -07:00
Jerry Zhao
ff3b66e2f2 Makefile should error if BINARY is set incorrectly 2023-05-09 17:38:46 -07:00
Jerry Zhao
d8bbc71821 Always generate objdump for run-binary-debug targets 2023-05-09 17:20:12 -07:00
abejgonzalez
1f687af997 Generate all lockfiles at once 2023-05-09 14:12:09 -07:00
abejgonzalez
dbbf7c90b4 Separate out conda-lock generation into new script 2023-05-09 13:58:40 -07:00
abejgonzalez
e832667cce Bump Verilator 2023-05-09 13:31:00 -07:00