David Biancolin
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4da9e49fc1
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[clocking] Fix up() invocations in freq specification fragments
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2020-11-09 08:32:25 -08:00 |
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David Biancolin
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04cd6b59bd
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[clocking] Add a fragment to set bus clock-sink freqs more intuitively
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2020-11-09 08:32:19 -08:00 |
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David Biancolin
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a559d624df
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[clocking] Drive all buses directly from the asyncClockGroup
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2020-11-07 21:57:42 -08:00 |
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Abraham Gonzalez
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5c5a4b51e3
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Merge pull request #710 from ucb-bar/rename-ariane
Rename Ariane to CVA6
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2020-11-06 14:53:54 -08:00 |
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abejgonzalez
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2de5f7dd7e
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[ci skip] Note that CVA6 was called Ariane in the past
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2020-11-05 15:48:50 -08:00 |
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abejgonzalez
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0685812c34
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Bump CVA6
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2020-11-05 10:30:00 -08:00 |
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David Biancolin
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c083d5d947
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Merge pull request #707 from ucb-bar/simple-pll-fixes
Update Reference Frequency Selection for Divider-Only Clock Generator
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2020-11-05 09:59:54 -05:00 |
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abejgonzalez
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60cd999002
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Bump CVA6 for Make fix
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2020-11-04 21:09:24 -08:00 |
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abejgonzalez
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59c9163bd5
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Bump CVA6 for submodule fixes
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2020-11-04 18:37:26 -08:00 |
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abejgonzalez
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fc8c5e4b30
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Use HTTPS for submodules
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2020-11-04 18:02:49 -08:00 |
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abejgonzalez
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a2ebbee2ac
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Rename Ariane to CVA6
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2020-11-04 15:42:30 -08:00 |
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David Biancolin
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f504b7a0f5
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[clocking] Improve reference clock selection using a multiple-of-fastest strategy
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2020-11-03 09:14:55 -08:00 |
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David Biancolin
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aa4a44925e
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[clocking] Add ScalaTests for the divider-only PLL configurator
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2020-11-03 09:14:55 -08:00 |
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David Biancolin
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f387634a41
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[clocking] Bound SimplePllConfiguration by maximum reference freq
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2020-11-03 09:14:55 -08:00 |
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David Biancolin
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946a191221
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[clocking] Provide a default div for ClockDividerN sv implementation (#706)
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2020-11-03 12:14:18 -05:00 |
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David Biancolin
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57a0bc5dfc
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Fix zsh compatibility in init-submodules-no-rv-tools (#705)
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2020-11-03 12:14:02 -05:00 |
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Jerry Zhao
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37415157d6
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Merge pull request #699 from ucb-bar/lazy-iobinders
Support diplomatic IOBinders
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2020-11-02 20:14:54 -08:00 |
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Jerry Zhao
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2d010b63f3
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Merge branch 'dev' into lazy-iobinders
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2020-11-02 10:02:44 -08:00 |
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Jerry Zhao
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a38596323c
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Merge pull request #703 from ucb-bar/default-async-reset
Make the ChipTop reset pin always async
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2020-10-29 10:34:22 -07:00 |
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Jerry Zhao
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7b83da054a
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Clean up HarnessBinders
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2020-10-28 16:18:22 -07:00 |
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Jerry Zhao
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f4d70128c0
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Remove redundant ChipTop reset synchronizer
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2020-10-28 15:37:31 -07:00 |
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Jerry Zhao
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93e57ef230
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Make the ChipTop reset pin async always
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2020-10-26 15:18:34 -07:00 |
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Jerry Zhao
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d61b31a6fe
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Merge pull request #702 from ucb-bar/multirocc-gemmini
Add MultiRoCCGemmini config fragment
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2020-10-26 10:03:26 -07:00 |
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Fang, Zitao
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4fdb9eb6b0
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Merge pull request #647 from ucb-bar/verilator-makefile-fix
Fix Verilator Simulation run-binary-debug Error
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2020-10-23 21:54:58 -07:00 |
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Zitao Fang
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abbeb2af9e
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Fixed comments
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2020-10-23 17:00:56 -07:00 |
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Zitao Fang
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0c4dcffb0d
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Fixed lowercase p bug
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2020-10-23 16:39:56 -07:00 |
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Jerry Zhao
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ac19117ec5
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Add MultiRoCCGemmini config fragment
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2020-10-23 15:41:49 -07:00 |
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Jerry Zhao
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7a55c55aa3
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Fix no-MBUS configs
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2020-10-20 01:12:28 -07:00 |
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Jerry Zhao
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e0bf907a06
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Merge remote-tracking branch 'origin/dev' into lazy-iobinders
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2020-10-19 13:22:01 -07:00 |
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David Biancolin
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a3c0e3a0b2
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Merge pull request #690 from ucb-bar/diplomatic-clocks-mbus-crossing
DRAM In A Separate Domain Take 2
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2020-10-19 15:15:09 -04:00 |
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Jerry Zhao
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f3d666d2b7
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Clarify HarnessBinders ClassTag naming
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2020-10-19 10:16:44 -07:00 |
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Jerry Zhao
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11fdf69544
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Merge pull request #693 from ucb-bar/smartelf2hex-memsiz
Update smartelf2hex to use MemSiz instead of FileSiz
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2020-10-19 09:05:50 -07:00 |
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David Biancolin
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c5e3ad0a01
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Bump tcip and fsim
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2020-10-19 15:32:48 +00:00 |
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Jerry Zhao
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035e2e4315
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Add test for make TOP=DigitalTop
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2020-10-17 22:55:07 -07:00 |
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Jerry Zhao
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9927231bc4
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Support lazy-iobinders
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2020-10-17 22:47:50 -07:00 |
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David Biancolin
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1b94e7f10c
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Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-mbus-crossing
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2020-10-16 23:21:20 +00:00 |
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alonamid
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46ea900538
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Merge pull request #695 from ucb-bar/shared-configs
Have FireSim build recipes use Chipyard configs rather than FireChip configs
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2020-10-16 14:28:35 -07:00 |
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Alon Amid
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8de7aa8d69
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bump firesim
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2020-10-16 18:18:35 +00:00 |
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Alon Amid
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6eaac63e1b
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address PR comments
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2020-10-16 06:34:26 +00:00 |
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David Biancolin
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f3e1cb434d
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Merge pull request #696 from ucb-bar/no-default-core-fame-models
Don't annotate cores with FAMEModelAnnotations
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2020-10-15 18:03:27 -04:00 |
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Albert Magyar
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84e0bf7338
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Don't annotate cores with FAMEModelAnnotations
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2020-10-15 12:25:39 -07:00 |
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David Biancolin
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b747116363
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Bump FireSim
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2020-10-15 11:28:44 -07:00 |
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David Biancolin
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74c1c9d7ab
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Punch out reset in AXI4MMIO IOBinder
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2020-10-15 11:28:36 -07:00 |
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Alon Amid
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fd4a70dfb6
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docs typos
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2020-10-15 18:04:31 +00:00 |
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Alon Amid
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6479d54f53
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bump firesim
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2020-10-15 17:53:25 +00:00 |
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Alon Amid
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c7a197d79a
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docs
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2020-10-15 17:51:28 +00:00 |
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Alon Amid
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20d3b9f9ce
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bump firesim
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2020-10-15 17:08:06 +00:00 |
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Alon Amid
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2c935b4ad7
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pull firesim mem model config into firesim tweaks
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2020-10-15 17:07:51 +00:00 |
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Alon Amid
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4a317b0cab
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differentiate default config package delimiter
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2020-10-15 17:07:20 +00:00 |
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David Biancolin
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9c8d2948af
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[firechip] Fix a broken config
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2020-10-14 15:33:32 -07:00 |
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