alonamid
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558cff7469
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update partial power flow
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2020-12-12 23:04:40 -08:00 |
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alonamid
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d6037946a6
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[skip ci] remove vlsi.core.node from example
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2020-12-07 00:30:12 -08:00 |
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alonamid
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db1543c4ed
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[skip ci] hammer request message
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2020-12-07 00:23:52 -08:00 |
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alonamid
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d8fd94d57c
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[skip ci] address some PR comments
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2020-12-07 00:16:05 -08:00 |
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alonamid
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477be36cef
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Apply suggestions from code review
Co-authored-by: Colin Schmidt <colins@eecs.berkeley.edu>
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2020-11-30 22:41:55 -08:00 |
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alonamid
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fef06f2f97
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Merge remote-tracking branch 'origin/dev' into hammer-docs
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2020-11-16 17:07:31 -08:00 |
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alonamid
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1c0707b25b
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Merge remote-tracking branch 'origin' into hammer-docs
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2020-11-16 17:06:33 -08:00 |
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Abraham Gonzalez
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f54dce13d6
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Merge pull request #709 from ucb-bar/small-backwards-compat
Bump Dromajo | Optional ignore QEMU toolchain flag
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2020-11-15 14:07:31 -08:00 |
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alonamid
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d7cc6b9963
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update hammer basic flow doc
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2020-11-15 10:00:40 -08:00 |
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Alon Amid
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2dd8bb46b8
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Merge branch 'hammer-docs' of https://github.com/ucb-bar/chipyard into hammer-docs
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2020-11-15 09:59:57 -08:00 |
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Alon Amid
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06f90119f6
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update example yml files
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2020-11-15 09:56:45 -08:00 |
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David Biancolin
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650ba7cc63
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Merge pull request #715 from ucb-bar/bus-crossing-fix
Fix Crossing Insertions Between Buses in Hierarchical Topology
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2020-11-14 15:37:08 -08:00 |
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David Biancolin
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80487cc371
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Update HierarchicalMulticlockBusTopologyParams to use cross{In, Out}
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2020-11-10 11:58:53 -08:00 |
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David Biancolin
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bb5d6bc9fb
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Merge pull request #713 from ucb-bar/better-bus-freq-spec
Better Bus Frequency Specification
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2020-11-09 19:18:44 -08:00 |
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David Biancolin
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230bd81e0e
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[firechip] Update legacy firechip config
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2020-11-09 09:26:30 -08:00 |
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David Biancolin
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098a83ce98
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[CI] Add a multiclock config
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2020-11-09 09:26:30 -08:00 |
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David Biancolin
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08c31014cc
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Build out a more complete multiclock example configuration
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2020-11-09 09:26:23 -08:00 |
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David Biancolin
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4da9e49fc1
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[clocking] Fix up() invocations in freq specification fragments
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2020-11-09 08:32:25 -08:00 |
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David Biancolin
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04cd6b59bd
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[clocking] Add a fragment to set bus clock-sink freqs more intuitively
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2020-11-09 08:32:19 -08:00 |
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David Biancolin
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a559d624df
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[clocking] Drive all buses directly from the asyncClockGroup
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2020-11-07 21:57:42 -08:00 |
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Abraham Gonzalez
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5c5a4b51e3
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Merge pull request #710 from ucb-bar/rename-ariane
Rename Ariane to CVA6
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2020-11-06 14:53:54 -08:00 |
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abejgonzalez
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2de5f7dd7e
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[ci skip] Note that CVA6 was called Ariane in the past
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2020-11-05 15:48:50 -08:00 |
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abejgonzalez
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0685812c34
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Bump CVA6
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2020-11-05 10:30:00 -08:00 |
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David Biancolin
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c083d5d947
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Merge pull request #707 from ucb-bar/simple-pll-fixes
Update Reference Frequency Selection for Divider-Only Clock Generator
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2020-11-05 09:59:54 -05:00 |
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abejgonzalez
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60cd999002
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Bump CVA6 for Make fix
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2020-11-04 21:09:24 -08:00 |
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Abraham Gonzalez
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9052b41328
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Re-ignore QEMU from gnu-toolchain | Avoid piping make version in toolchain build
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2020-11-04 20:59:14 -08:00 |
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abejgonzalez
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59c9163bd5
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Bump CVA6 for submodule fixes
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2020-11-04 18:37:26 -08:00 |
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abejgonzalez
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fc8c5e4b30
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Use HTTPS for submodules
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2020-11-04 18:02:49 -08:00 |
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Abraham Gonzalez
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94eceeb624
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Use empty variable instead of t/f
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2020-11-04 15:54:09 -08:00 |
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abejgonzalez
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a2ebbee2ac
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Rename Ariane to CVA6
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2020-11-04 15:42:30 -08:00 |
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Abraham Gonzalez
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5e3d1a605d
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Add --ignore-qemu flag to toolchains | Prepare QEMU when it builds
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2020-11-04 11:57:23 -08:00 |
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Abraham Gonzalez
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16c34e2cf3
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Bump Dromajo for old glibc
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2020-11-04 11:46:02 -08:00 |
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David Biancolin
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f504b7a0f5
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[clocking] Improve reference clock selection using a multiple-of-fastest strategy
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2020-11-03 09:14:55 -08:00 |
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David Biancolin
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aa4a44925e
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[clocking] Add ScalaTests for the divider-only PLL configurator
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2020-11-03 09:14:55 -08:00 |
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David Biancolin
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f387634a41
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[clocking] Bound SimplePllConfiguration by maximum reference freq
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2020-11-03 09:14:55 -08:00 |
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David Biancolin
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946a191221
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[clocking] Provide a default div for ClockDividerN sv implementation (#706)
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2020-11-03 12:14:18 -05:00 |
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David Biancolin
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57a0bc5dfc
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Fix zsh compatibility in init-submodules-no-rv-tools (#705)
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2020-11-03 12:14:02 -05:00 |
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Jerry Zhao
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37415157d6
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Merge pull request #699 from ucb-bar/lazy-iobinders
Support diplomatic IOBinders
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2020-11-02 20:14:54 -08:00 |
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alonamid
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8bf23177d3
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VLSI docs revamp midpoint
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2020-11-02 14:32:39 -08:00 |
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Alon Amid
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0f3f283893
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example ymls
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2020-11-02 22:31:24 +00:00 |
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Alon Amid
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3e4fddbc69
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make hammer work according to docs
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2020-11-02 22:30:06 +00:00 |
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Jerry Zhao
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2d010b63f3
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Merge branch 'dev' into lazy-iobinders
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2020-11-02 10:02:44 -08:00 |
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Jerry Zhao
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a38596323c
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Merge pull request #703 from ucb-bar/default-async-reset
Make the ChipTop reset pin always async
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2020-10-29 10:34:22 -07:00 |
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Jerry Zhao
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7b83da054a
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Clean up HarnessBinders
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2020-10-28 16:18:22 -07:00 |
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Jerry Zhao
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f4d70128c0
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Remove redundant ChipTop reset synchronizer
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2020-10-28 15:37:31 -07:00 |
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alonamid
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f387c4b994
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Merge pull request #688 from amsharifian/patch-1
Updating Gemmini.rst
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2020-10-26 17:56:17 -07:00 |
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Jerry Zhao
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93e57ef230
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Make the ChipTop reset pin async always
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2020-10-26 15:18:34 -07:00 |
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Jerry Zhao
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d61b31a6fe
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Merge pull request #702 from ucb-bar/multirocc-gemmini
Add MultiRoCCGemmini config fragment
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2020-10-26 10:03:26 -07:00 |
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Fang, Zitao
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4fdb9eb6b0
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Merge pull request #647 from ucb-bar/verilator-makefile-fix
Fix Verilator Simulation run-binary-debug Error
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2020-10-23 21:54:58 -07:00 |
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Zitao Fang
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abbeb2af9e
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Fixed comments
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2020-10-23 17:00:56 -07:00 |
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