Commit Graph

125 Commits

Author SHA1 Message Date
Jerry Zhao
623bafacd5 Warn if RISCV unset (#601) 2020-06-10 14:46:53 -07:00
abejgonzalez
5c3a7c136b [ci] remove midas-examples ci 2020-05-31 23:20:38 -07:00
abejgonzalez
4e09d91faa bump firemarshal/hammer-mentor-plugins | add submodules to check script 2020-05-28 16:27:58 -07:00
Abraham Gonzalez
a1717e4032 Merge pull request #568 from ucb-bar/dev-dsptools
Dsptools example cleanup
2020-05-28 15:25:09 -07:00
abejgonzalez
4972866b40 add coursier cache to firesim/midas tests 2020-05-28 13:50:19 -07:00
abejgonzalez
bbc03f6235 cleanup old folders in ci | add coursier cache export 2020-05-28 13:28:34 -07:00
Paul Rigge
e6984e412b Use Chain for dsptools example.
Rename examples, bump dsptools to master, and incorporate feedback.
2020-05-26 23:00:37 +00:00
Paul Rigge
7c074661d5 Add CI for dsptools examples 2020-05-25 20:27:58 +00:00
abejgonzalez
d2060947b6 bump toolchain version | fix git submodule update 2020-05-19 21:21:10 -07:00
Abraham Gonzalez
85b555dbce NVDLA Integration + Cleanup Ariane Preprocessing (#505)
* [nvdla] initial nvdla integration

* [nvdla] add firesim configs

* [nvdla] re-add accidentally deleted line

* [nvdla] works on master with small

* [nvdla] use master branch of nvdla

* [nvdla] remove extra sources

* [nvdla] bump

* [nvdla + ariane] bump and use insert-includes for pre-processing

* [nvdla] add ci | remove target configs in FireChip | update naming

* [nvdla] bump nvdla | fix ci run-tests error

* [nvdla] re-enable PCWM-L error | fix/update makefile(s)

* [nvdla] bump nvdla fragments in FireChip

* [misc] bump tutorial patches

* [chipyard] remove extra import

* [nvdla] bump nvdla for pbus [ci skip]

* [nvdla] update firemarshal and add nvdla workload

* [nvdla] bump nvdla-workload

* [nvdla] bump hw

* [docs] add basic documentation

* [docs] adjustments to documentation

* [misc] update docs | bump firesim with recipe

* [misc] disable error on warnings in verilator | bump number width to match RC

* [docs] fix doc build error

* [verilator] move no fail on warning to be global

* [ci skip] [nvdla] bump submodule urls

* [misc] move firesim specific configs into nvdla dir [ci skip]

* [nvdla] fix run-tests in ci

* update RC configs | bump marshal | bump nvdla-workload

* [nvdla] bump nvdla-workload [ci skip]

* add topology mixin to nvdla configs

* update tutorial patches
2020-05-16 12:22:30 -07:00
Jerry Zhao
3f5a204fd0 BOOM Bump w. Fromajo (#523)
* [uart] add uart adapter | add uart + adapter to all configs

* [uart] change pty define name | add uart to all configs that need it

* [uart] default to 115200 baudrate

* [dromajo] first working commit

* [dromajo] bump boom for commit-width > 1 fix

* [dromajo] adjust dromajo commits

* [dromajo] bump boom

* commit dromajo changes

* extra

* [dromajo] add block device to configs

* rebump older modules

* bump firesim

* [chipyard] enable dromajo in midas level simulation

* [testchipip] forgot to bump

* get rid of breaking things

* bump firesim

* bump boom

* Bump BOOM to ifu3 WIP

* bump firesim

* fix how memory is passed to dromajo

* bump boom and firesim

* fix merge issues

* add dromajo cosim bridge in chipyard

* move traceio back into testchipip (#488)

* refer to testchipip traceio in firechip (#490)

* Move TraceIO fragment to chipyard (#492)

* fix chipyard dromajo bridge (#493)

* Sboom dromajo bump (#501)

* [FireChip] Use clock in BridgeBinders

* [firesim] Update TraceGen BridgeBinder

* [Firechip] Add support for Tile <-> Uncore rational division

* [firesim] Update the multiclock test

* [firechip] Commit some Eagle X-related mock configs

* [firechip] Instantiate multiple TracerV bridges

* [Firechip] Include reset in tracerv tokens

* [TracerV] Drop the first token in comparison tests

* [Firechip] Make reverse instruction order in trace printf

* WARNING: Point at a fork of boom @ davidbiancolin

* [firesim] Update ClockBridge API

* Add Gemmini to README [ci skip] (#487)

* [firechip] Isolate all firesim-multiclock stuff in a single file

* add documentation on ring network and system bus

* Bump firesim for CI

* Bump FireSim

* Bump testchipip to dev

[ci skip]

* Bump FireSim

* [make] split up specific make vars/targets into frags (#499)

* [make] split up specific make vars/targets into frags

* [make] move dramsim and max-cycles into SIM_FLAGS

* [misc] move ariane configs to configs/ folder

* [dromajo] add dromajo

* [dromajo] bump for new traceio changes

* bump firesim

* bump firesim

* point to chipyard traceio

* bump boom

Co-authored-by: David Biancolin <david.biancolin@gmail.com>
Co-authored-by: Howard Mao <zhehao.mao@gmail.com>

* Support Dromajo + TracerV configurations

* [docs] add documentation for Dromajo in FireSim + Chipyard

* add a bit more docs

* [docs] bump docs

* [firesim] dump artefacts in firesim

* [firesim] update firesim

* [testchipip] remove extraneous items in testchipip

* [dromajo] prevent dromajo from breaking when params unset

* update firesim, dromajo, and testchipip

* [firesim] bump firesim

* [firesim] bump firesim

* [misc] bump firesim and testchipip for reviewer comments

* remove WithNoGPIO fragment

* bump firesim

* bump dromajo boom config

* bump firesim

* generate artefacts in firesim testsuite

Co-authored-by: abejgonzalez <abe.j.gonza@gmail.com>
Co-authored-by: Abraham Gonzalez <abe.gonzalez@berkeley.edu>
Co-authored-by: David Biancolin <david.biancolin@gmail.com>
Co-authored-by: Howard Mao <zhehao.mao@gmail.com>
2020-05-16 00:21:24 -07:00
John Wright
7c7b336c3f Add SPI flash support (#546)
* Add SPI flash configs, IOBinders, CI tests, and docs

* Add writable SPI flash support

* bump

* Fix CI

* Fix CI

* Update docs/Generators/TestChipIP.rst

Co-authored-by: Chick Markley <chick@qrhino.com>

* Maybe actually fix CI

* Fix broken merge

* Fix the tutorial patch

* bump tcip to master

* fix GPIO naming bug

Co-authored-by: Chick Markley <chick@qrhino.com>
2020-05-14 19:19:50 -07:00
alonamid
3e57a5f539 Merge pull request #544 from ucb-bar/firrtl-1.3-RC-bump
Rocket Chip Bump with Chisel 3.3 and FIRRTL 1.3
2020-05-13 16:39:50 -07:00
abejgonzalez
460455e790 extend midas examples timeout in ci 2020-05-13 13:18:06 -07:00
Albert Magyar
2a6bd3bd5c Bump verilator to v4.034 (#547)
* Bump verilator to v4.034
* Add new flags to verilator makefile
* Conditionally set timescale flag based on Verilator version
2020-05-11 23:02:37 -07:00
Howard Mao
94628e78b2 add icenet and testchipip unit tests to CI 2020-04-28 10:34:29 -07:00
David Biancolin
462f4d0f31 [CI] Disable SBT supershell 2020-04-26 21:11:31 -07:00
David Biancolin
b26ed91b73 [CI] Convert FireSim tests to use ScalaTest 2020-04-26 21:11:31 -07:00
David Biancolin
f30daa4063 [ci] Lengthen hetero tests timeout 2020-04-24 13:33:30 -07:00
Abraham Gonzalez
7b6a45a6a8 [ci] remove approval button for ci jobs (#521) 2020-04-20 17:08:15 -07:00
Abraham Gonzalez
8469ce62e1 Revert "[ci] bypass approval button on dev/master (#519)" (#520)
This reverts commit 0035154168.
2020-04-18 17:11:13 -07:00
Abraham Gonzalez
0035154168 [ci] bypass approval button on dev/master (#519) 2020-04-18 17:09:31 -07:00
David Biancolin
e7a8ea4bf4 Merge pull request #503 from ucb-bar/rc-bump-april
Stage / Phase RC Bump
2020-04-18 16:08:24 -07:00
David Biancolin
b303cf6e81 Rocket Chip Stage/Phase Bump (#503)
[WIP] Minimally elaborating design

Bring up a feature-complete Chipyard stage

Pull in Makefrag generation; Bump submodules

Update config generation, and global reset scheme

Bump submodules; clean up

Bump FireSim

Remove some unhygenic comments / WS

Remove the rocketchip subproject

[CI] Lengthen ariane tests timeout

Address some remaining reviewer comments

[firechip] Refresh a Field that cannot be used across repeated instantiations

Bump all submodules
2020-04-18 17:54:27 +00:00
Abraham Gonzalez
a6d9589ed8 [ci] add approval button (#510) 2020-04-15 13:38:49 -07:00
Abraham Gonzalez
e94dc287b1 [docs/ci] cleanup docs and add ci to check it (#485) 2020-03-17 10:48:18 -07:00
Abraham Gonzalez
f517070432 Move DockerImage into Chipyard + Bump BOOM (#463)
* [ci] move docker image to chipyard [ci skip]

* [ci] bump with new image

* [boom] bump
2020-03-10 11:33:06 -07:00
Abraham Gonzalez
d0bec3fba7 Ariane Integration (#448)
* [ariane/make] integrate ariane | have verilator be installed on path not in makefile

* [misc] warn on verilator not found | search for v files | cleanup build.sbt + .gitignore

* [firesim] bump

* [ci] add midas ariane tests

* [docker/ci] use new docker-image with verilator | re-elab on v changes for ariane | address comments

* [ci] remove references to local verilator install

* [verilator] update flags

* [verilator] minimal set of flags for ariane

* [ariane] bump ariane to master

* [ci] revert to 4.016 verilator

* [ci] install verilator to ci server | misc compile fixes

* [ci/make] add longer ci timeout | update when assert is added in verilator sim

* [firesim] bump for misc. updates

* [make/ci] cleanup makefile and remove firesim tests of it

* [docs/firesim] bump and clean docs

* [firesim] bump

* [ci] use remote verilator for midas tests

* [misc] cleanup built.sbt more

* [firesim] bump

* [misc] bump build.sbt patch for tutorials

* [firesim/ci] cleanup and bump firesim
2020-03-09 18:06:41 -07:00
Jerry Zhao
854e71a205 Add tutorial config and tutorial patches 2020-03-05 19:44:37 -08:00
Jerry Zhao
941c217fbe [ci] Use FireSim's setup script for CI 2020-02-14 16:57:10 -08:00
Jerry Zhao
0f56c4ce44 Unify configs between Chipyard and FireSim 2020-02-13 12:33:28 -08:00
Jerry Zhao
ebfa545344 Generator unification 2020-02-13 12:33:28 -08:00
Jerry Zhao
49dbe8daba Rename top-level example package to chipyard
* FireChip now directly uses the Chipyard Top
2020-02-13 12:33:04 -08:00
Abraham Gonzalez
3e4c99e044 [ci] use re-usable config. components (#421) 2020-02-04 18:33:08 -08:00
Jerry Zhao
05f17f5b99 [tracegen] Add tracegen support for the BOOM L1D (#362)
* [tracegen] Add tracegen support for the BOOM L1D

* [tracegen] Split up BOOM Tracegen mixin and shim.

* [ci] Fix tracegen hash for testing
2020-01-23 16:01:32 -08:00
Jerry Zhao
ac5235e5ed Revamp the config system for Top/Harness (#347)
* Refactor how Configs parameterize the Top and TestHarnesses

* Bump sha3, testchipip, icenet, firesim
2020-01-21 20:44:54 -08:00
Colin Schmidt
1786b9a7f4 Don't check prebuilt tools are on master (#384)
Backport from #362 
h/t @jerryz123
2020-01-21 15:19:54 -08:00
Albert Ou
7059ac3f0f toolchains: Add libgloss replacement 2019-12-21 12:11:49 -08:00
Albert Ou
f71d976114 toolchains: Build libraries with medany code model
This enables bare-metal programs to link against newlib and libgcc at
addresses above 0x80000000.
2019-12-21 12:11:48 -08:00
alonamid
56770a1a4c Gemmini Integration (#356)
* gemmini submodule

* fix build.sbt

* firechip gemmini config

* bump gemmini

* bump gemmini

* bump gemmini

* fix hwacha typo

* start gemmini docs

* bump gemmini

* gemmini docs

* Update Gemmini RST. Add quick-build instructions to Gemmini RST

* start gemmini CI

* bump gemmini

* gemmini CI fixes

* bump gemmini

* fix simulator name in gemmini CI

* cleanup gemmini CI

* bump esp-isa-sim to include gemmini

* update gemmini docs

* [ci skip] fix gemmini docs typos

* Update Gemmini.rst

Add instructions on building Gemmini programs, or writing your own programs.

* Changed order of VCS and Verilator in Gemmini docs

* Remove "make your own tests" from Gemmini README

* bump gemmini

* try to fix midasexamples CI
2019-12-14 01:36:42 -08:00
Jerry Zhao
72f9730cbd Allow user to specify toolchain install prefix (#334) 2019-12-13 11:40:47 -08:00
Jerry Zhao
4d58321f1c Do not check that chisel3 and firrtl submodule branches are whitelisted (#366)
Chisel3 and FIRRTL use release branches, which we track instead.
2019-12-13 11:38:49 -08:00
Jerry Zhao
3bc0e7856f [ci] Whitelist submodule dev branches to enable running submodule-commit checks on dev
This works by checking the $CIRCLE_BRANCH env-var, which is set automatically by
CircleCI. Annoyingly, this is set to the name of the source branch for a merge,
rather than the target branch. The behavior of this check for each branch type
is listed:

if CIRCLE_BRANCH == "master":
  This CI run is the nightly CI run for the master branch.
  Make sure all submodules of the master branch point to master
else if CIRCLE_BRANCH == "dev":
  This CI run is most likely somebody doing a dev->master merge.
  Make sure all submodules of the dev branch point to master
else:
  This CI run is likely somebody merging a feature branch into dev.
  Allow submodule pointers of the dev branch to point to master OR dev
2019-11-23 17:51:51 -08:00
abejgonzalez
542b165fd6 cleanup build script for ci | bump firesim 2019-11-11 11:13:14 -08:00
Howard Mao
05af2f9a9c Fix tracegen target and add to CI 2019-10-21 09:55:40 -07:00
Abraham Gonzalez
ced4d2eea0 Merge pull request #314 from ucb-bar/master
`master` fixes into `dev`
2019-10-18 21:05:29 -04:00
abejgonzalez
f0fa623000 also check firesim 2019-10-15 10:31:09 -07:00
abejgonzalez
7e908b4964 update ci to exit at the end instead of partway through | fix flattened toolchain repos 2019-10-14 13:27:58 -07:00
Abraham Gonzalez
b004ecc8bf Merge pull request #284 from ucb-bar/add-hwacha-tests
Check and add Hwacha tests
2019-10-14 13:43:24 -04:00
David Biancolin
84611fed8a [CI] Completely remove the clockdiv tests 2019-10-13 15:22:49 -07:00