Jerry Zhao
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79042e4ce8
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Bump to support firesim simulation of no-AXI4DRAM designs
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2020-10-01 10:21:43 -07:00 |
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Jerry Zhao
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164617e2d6
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Fix no-mbus example design
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2020-10-01 10:20:10 -07:00 |
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Jerry Zhao
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489ae695fc
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Add tile-resetter to all designs
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2020-10-01 10:19:43 -07:00 |
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David Biancolin
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45d40eb2af
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Merge pull request #676 from ucb-bar/diplomatic-clocks-pll-redux
Simple Divider-Only PLL for Multiclock RTL Simulation
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2020-09-30 22:30:35 -07:00 |
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David Biancolin
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7d7f7ae4a8
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Bump FireSim
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2020-09-30 14:43:29 -07:00 |
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David Biancolin
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ebfe3103a4
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[clocks] IdealizedPll -> DividerOnlyClockGenerator
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2020-09-29 17:33:49 -07:00 |
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David Biancolin
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5b414f5829
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[clocks] Emit frequency summary for divider-only PLL model
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2020-09-29 16:59:37 -07:00 |
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David Biancolin
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a6ce850391
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[clocks] ClockDividerN: make first output edge occur on first input edge
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2020-09-29 16:19:05 -07:00 |
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David Biancolin
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b76972d34b
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Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-pll-redux
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2020-09-25 11:02:51 -07:00 |
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David Biancolin
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67145c6ccd
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[clocking] Fix FireSim clock look up
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2020-09-25 10:05:28 -07:00 |
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David Biancolin
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1b3514f95f
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[clocks] Specify a default frequency for TraceGen
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2020-09-25 10:03:46 -07:00 |
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David Biancolin
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7b8a954d04
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[firechip] Rework FireSim clocking to be more similar to default CY targets
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2020-09-24 23:32:07 -07:00 |
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David Biancolin
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cc949aadab
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[clocking] Address some of Colin's PR comments
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2020-09-24 23:28:47 -07:00 |
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David Biancolin
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f6989a1968
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[clocks] Use the periphery frequency as the default
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2020-09-24 23:24:08 -07:00 |
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David Biancolin
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96bf702c3b
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[clocks] Factor out the PLL calculations into their own class
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2020-09-24 23:23:11 -07:00 |
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David Biancolin
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84195d28bb
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[clocks] Don't override existing take frequency if present.
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2020-09-23 15:29:52 -07:00 |
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Jerry Zhao
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023d8096a9
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Merge pull request #677 from ucb-bar/smartelf2hex-fix
Fix smartelf2hex.sh creating files 64x the minimum size
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2020-09-22 17:04:45 -07:00 |
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Jerry Zhao
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d5660c01f3
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Bump esp-isa-sim for loadmem-fix add TLS segments to smartelf2hex
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2020-09-22 12:58:34 -07:00 |
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Jerry Zhao
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6c297e3179
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Fix smartelf2hex.sh creating files 64x the minimum size
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2020-09-22 11:08:52 -07:00 |
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Jerry Zhao
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ba05b32f9c
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Merge pull request #673 from ucb-bar/serial-tl
Serial-tilelink backing memory
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2020-09-18 15:30:04 -07:00 |
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David Biancolin
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f36183d236
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[clocks] Update AssignerKey name and comment
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2020-09-18 11:28:31 -07:00 |
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Jerry Zhao
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bbf941c865
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Bump Firesim
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2020-09-18 10:43:58 -07:00 |
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Jerry Zhao
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aa355c7c1a
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Bump firesim
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2020-09-18 10:41:59 -07:00 |
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Jerry Zhao
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b9622c5132
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Merge remote-tracking branch 'origin/dev' into serial-tl
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2020-09-18 01:00:13 -07:00 |
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David Biancolin
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ad147ec7f2
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[clocks] Remove dealiaser and node injector until they are needed
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2020-09-17 11:43:39 -07:00 |
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David Biancolin
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0f33ea3999
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[clocks] Stringly specified clock frequencies; DRY out schemes
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2020-09-17 11:41:05 -07:00 |
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David Biancolin
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6a26a350ee
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[clocks] Update dealiaser based on feedback
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2020-09-17 11:33:26 -07:00 |
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David Biancolin
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cfa7e30d95
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[clocks] Fix comment in ClockDividerN
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2020-09-17 11:32:51 -07:00 |
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Jerry Zhao
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43f746edb6
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Merge pull request #675 from ucb-bar/faster-ci
Improve CI build times by grouping similar builds
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2020-09-16 22:55:27 -07:00 |
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David Biancolin
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b8d3e4a66d
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Update Idealized PLL config
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2020-09-16 16:30:25 -07:00 |
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David Biancolin
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8e4dedcecf
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Remove require guard on divided configs
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2020-09-16 16:30:00 -07:00 |
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David Biancolin
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895bacea98
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WIP - Simple divider-only PLL generation flow
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2020-09-16 16:00:26 -07:00 |
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Jerry Zhao
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6874308981
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Address review comments
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2020-09-16 15:43:25 -07:00 |
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Jerry Zhao
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269af01a70
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Bump testchipip
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2020-09-16 13:51:33 -07:00 |
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Jerry Zhao
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36ccb12560
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Bump testchipip
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2020-09-16 10:29:03 -07:00 |
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Jerry Zhao
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aa8b7c15ec
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Reduce CI redundancy by grouping builds
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2020-09-16 00:57:05 -07:00 |
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Jerry Zhao
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0d8e87126c
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Deprecate support for on-chip SerialAdapter
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2020-09-14 19:43:32 -07:00 |
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Jerry Zhao
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f9cc1dc2c2
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Merge remote-tracking branch 'origin/dev' into serial-tl
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2020-09-14 19:35:43 -07:00 |
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Jerry Zhao
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23a199eccf
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Merge pull request #674 from ucb-bar/iocells-fix
Undo regression in iocells flexibility
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2020-09-14 19:32:37 -07:00 |
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Jerry Zhao
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10625a3a6c
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Undo regression in iocells flexibility
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2020-09-14 13:27:31 -07:00 |
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Jerry Zhao
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16c80112a7
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Merge pull request #670 from ucb-bar/harness-refactor
Split IOBinders into IOBinders and HarnessBinders | punch out clocks to harness for simwidgets and bridges
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2020-09-14 12:45:46 -07:00 |
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Jerry Zhao
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6c5bce5430
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Support Tilelink over serial
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2020-09-13 11:59:16 -07:00 |
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Jerry Zhao
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be0c041232
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Bump Firesim
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2020-09-13 06:36:37 +00:00 |
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Jerry Zhao
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d2b42cee2c
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Bump testchipip
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2020-09-12 23:31:54 -07:00 |
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Jerry Zhao
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a5385c0a54
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Update testchipip/icenet to use rocket-chip Located API
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2020-09-11 00:02:07 -07:00 |
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Jerry Zhao
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facef464e6
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Update BridgeBinders | fix runtime HarnessBinder port type checks
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2020-09-09 00:15:02 -07:00 |
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Jerry Zhao
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8f9574fd79
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Clean up passing ports from IOBinders to HarnessBinders
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2020-09-08 22:30:17 -07:00 |
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Jerry Zhao
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11a9ad2428
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Address code review comments
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2020-09-08 15:52:09 -07:00 |
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Jerry Zhao
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b4e270219d
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Bump firesim
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2020-09-07 14:02:31 -07:00 |
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Jerry Zhao
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7ed02a7d38
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Fix Typos
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2020-09-07 11:36:37 -07:00 |
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