joey0320
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8491f3a7b9
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Bump barfetchers
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2024-01-20 16:50:05 -08:00 |
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joey0320
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855a86b887
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Bump testchipip
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2024-01-20 16:50:05 -08:00 |
|
Tynan McAuley
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b50b83a769
|
Update deprecated/unused Chisel APIs
These have been deprecated since Chisel 3.6.0. They are being removed in
Chisel 6, and will become compile errors at that point.
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2024-01-18 13:53:18 -08:00 |
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Jerry Zhao
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565c187549
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Switch static assert to require
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2024-01-16 10:15:53 -08:00 |
|
Ella Schwarz
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47322af3c0
|
Add assert to check that chip id pin is wide enough
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2024-01-14 14:47:12 -08:00 |
|
Ella Schwarz
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67faf0c3e3
|
Use harness binder chipId to support multi-chip id pins
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2024-01-12 11:39:54 -08:00 |
|
Ella Schwarz
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e7ed33244a
|
fix naming
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2024-01-12 10:36:54 -08:00 |
|
Ella Schwarz
|
fcf9139009
|
bump tcip
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2024-01-12 10:36:50 -08:00 |
|
Ella Schwarz
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7c55ff39cc
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Add chipid port
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2024-01-12 10:35:20 -08:00 |
|
Jerry Zhao
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f84b2428d5
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Fix CanHaveClockTap
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2024-01-11 16:40:57 -08:00 |
|
Jerry Zhao
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45d74f6db2
|
Merge remote-tracking branch 'origin/main' into symmetric_sertl
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2024-01-11 11:43:24 -08:00 |
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Jerry Zhao
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8073ecb1e8
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Merge pull request #1697 from ucb-bar/clock_tap
Add debug clock tap port to all default designs
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2024-01-11 11:38:20 -08:00 |
|
Jerry Zhao
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5bc9aea8da
|
Bump rc-inclusive-cache
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2024-01-09 13:51:55 -08:00 |
|
Jerry Zhao
|
d51a9a74d3
|
Merge remote-tracking branch 'origin/main' into clusters
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2024-01-09 13:30:26 -08:00 |
|
Jerry Zhao
|
7c13574769
|
Rename cache/blocks submodules to match new chipsalliance ownership
|
2024-01-05 10:42:00 -08:00 |
|
Tynan McAuley
|
0a42dd1ca1
|
Update deprecated APIs to prepare for Chisel 5
- `IO` was moved from `chisel3.experimental` to `chisel3`
- `DataMirror` was moved from `chisel3.experimental` to `chisel3.reflect`
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2024-01-03 16:22:51 -08:00 |
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Jerry Zhao
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96ffc8f0a1
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git push origin symmetric_sertl
Merge remote-tracking branch 'origin/main' into symmetric_sertl
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2024-01-01 19:14:21 -08:00 |
|
Jerry Zhao
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41651edbdc
|
Bump firesim | fix testchipip segfaults
|
2024-01-01 18:40:59 -08:00 |
|
-T.K.-
|
f3ab8bb7ca
|
Merge branch 'main' into clock_tap
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2024-01-01 14:00:24 -08:00 |
|
Jerry Zhao
|
0069d17caf
|
Merge remote-tracking branch 'origin' into symmetric_sertl
|
2024-01-01 11:23:31 -08:00 |
|
-T.K.-
|
e8496c528f
|
Merge branch 'main' into add-default-scratch
|
2023-12-30 22:45:27 -08:00 |
|
Jerry Zhao
|
0fa09da5c1
|
Remove MBus spad from configs that do not support it
|
2023-12-30 07:03:34 -08:00 |
|
Tynan McAuley
|
c2175f4500
|
Reduce CDE lookups for IOBinders
|
2023-12-29 21:22:34 -08:00 |
|
-T.K.-
|
07a7f30b3b
|
ADD: set scratchpad as default config
|
2023-12-29 19:21:10 -08:00 |
|
-T.K.-
|
3eef3c36a6
|
Merge branch 'main' into clock_tap
|
2023-12-29 16:59:29 -08:00 |
|
Jerry Zhao
|
cce5122fd2
|
Bump testchipip to fix memory leak
|
2023-12-27 12:05:26 -08:00 |
|
Jerry Zhao
|
86f028ac78
|
Update SimTSI API in spiketile
|
2023-12-27 10:33:28 -08:00 |
|
Jerry Zhao
|
835562238a
|
Explicitly pass chipId to all HarnessBinders
|
2023-12-26 18:37:39 -08:00 |
|
Jerry Zhao
|
3885e79f77
|
Bump testchipip
|
2023-12-26 17:19:09 -08:00 |
|
Jerry Zhao
|
fdeede7b0b
|
Add tests for symmetric rocket chiplet config
|
2023-12-26 12:55:32 -08:00 |
|
Jerry Zhao
|
8e37dcdf81
|
Support multi-TSI/multi-SimDRAM
|
2023-12-26 12:52:23 -08:00 |
|
Jerry Zhao
|
81cc556c3b
|
Add symmetric rocket config
|
2023-12-26 10:05:44 -08:00 |
|
Jerry Zhao
|
194d4462f9
|
Update testchipip with source-synchronous serdes
|
2023-12-21 20:33:24 -08:00 |
|
Jerry Zhao
|
cfd555ee94
|
Bump testchipip for updated sertl type names
|
2023-12-21 14:18:06 -08:00 |
|
Jerry Zhao
|
b7176b3c29
|
Bump testchipip
|
2023-12-19 15:14:39 -08:00 |
|
Jerry Zhao
|
1e5ebf192a
|
Update firesim/firechip with new testchipip packaging
|
2023-12-19 12:11:12 -08:00 |
|
Jerry Zhao
|
733bd3e7ea
|
Bump testchipip for more organized package
|
2023-12-19 12:03:50 -08:00 |
|
Jerry Zhao
|
ca6f3d9fab
|
Enabling disable all the PLLSelectorDivider features for Verilator CI
This is to work-around Verilator's modeling of reset, which does not
model a posedge reset as t=0
|
2023-12-19 09:10:19 -08:00 |
|
Jerry Zhao
|
7e90fc3e5e
|
Disable JTAG reset synchronization for verilator CI
|
2023-12-18 18:01:25 -08:00 |
|
Jerry Zhao
|
4b9e9dacbc
|
Move clock tap to its own async domain
|
2023-12-18 18:00:44 -08:00 |
|
Jerry Zhao
|
b02621db35
|
Merge remote-tracking branch 'origin/main' into clusters
|
2023-12-16 17:00:34 -08:00 |
|
Jerry Zhao
|
2f1012294d
|
Merge branch 'main' into clock_tap
|
2023-12-16 16:56:10 -08:00 |
|
Jerry Zhao
|
6d60ad6c40
|
Merge remote-tracking branch 'origin/main' into clusters
|
2023-12-16 14:06:08 -08:00 |
|
Jerry Zhao
|
fdd9ff6127
|
Bump testchipip
|
2023-12-16 14:04:39 -08:00 |
|
joey0320
|
6bf915a89c
|
Add spike-devices as a submodule
|
2023-12-16 12:56:54 -08:00 |
|
Jerry Zhao
|
9f1b031f85
|
Merge remote-tracking branch 'origin/main' into tcip-bump
|
2023-12-16 12:40:16 -08:00 |
|
Jerry Zhao
|
f9b5bee98b
|
Merge pull request #1633 from ucb-bar/constellation-bump
Bump constellation with improved TL-noc
|
2023-12-16 12:28:47 -08:00 |
|
Jerry Zhao
|
2e77867577
|
[ci skip] Add inline comments on some of the clocking fragments
|
2023-12-16 12:24:22 -08:00 |
|
Jerry Zhao
|
e7f10348b0
|
Merge remote-tracking branch 'origin/main' into clusters
|
2023-12-15 16:46:51 -08:00 |
|
Jerry Zhao
|
b37b6b0d9b
|
Remove clock tap from firesim designs
|
2023-12-15 15:51:04 -08:00 |
|