Commit Graph

115 Commits

Author SHA1 Message Date
Paul Rigge
3c9d56e349 Merge pull request #186 from ucb-bar/dsptools
Add dsptools
2019-08-11 14:45:09 -07:00
Paul Rigge
ee75c03875 Add dsptools. 2019-08-02 15:09:22 -07:00
Albert Magyar
c487ca2f66 Coordinate Top and Harness generation (#168)
* Coordinate Top and Harness generation

* Bump barstools
2019-07-31 09:36:52 -07:00
Albert Magyar
7dc05e678f Bump firrtl, filter Emitted and Circuit annotations to save heap space (#183) 2019-07-30 13:58:11 -07:00
abejgonzalez
0088a6a8e8 revert firrtl 2019-07-02 17:30:46 -07:00
abejgonzalez
dc9cef30ae bump rc/firrtl | bump to temp boom/testchipip 2019-06-28 11:07:41 -07:00
Jerry Zhao
408dbcafa2 Bump barstools 2019-05-17 18:26:00 -07:00
Jerry Zhao
a7a4dd345b Bump to May rocketchip | Support for BigInt mems 2019-05-17 18:21:20 -07:00
abejgonzalez
885c5f74db bump boom/firrtl | support building boom | update genfiles in simulator to make rv32 bootrom | misc cleanup 2019-04-17 17:08:08 -07:00
abejgonzalez
80cbdd1d31 Merge remote-tracking branch 'origin/rebar-dev-align' into boom-add 2019-04-17 16:07:02 -07:00
abejgonzalez
7d887b212c align rebar with tip of project-template master | fixes build issues 2019-04-17 16:02:44 -07:00
abejgonzalez
d80acd8cf8 added boom and torture | added csmith 2019-04-15 10:17:42 -07:00
Colin Schmidt
ffee1f1e98 Bump barstools and re-add infer-rw for better SRAM mapping 2019-03-18 07:31:27 -07:00
alonamid
2e7791a57d add chisel and firrtl submodules 2019-03-12 14:30:38 -07:00
alonamid
2def0dfea7 change dir structure 2019-03-12 14:30:38 -07:00