Commit Graph

115 Commits

Author SHA1 Message Date
abejgonzalez
f3c3ecf149 Move install-circt submodule 2023-12-07 10:55:19 -08:00
Abraham Gonzalez
9ba58f89f1 Merge branch 'main' into bump-barstools 2023-10-16 16:22:12 -07:00
abejgonzalez
b1f3119676 Bump barstools 2023-10-16 16:18:42 -07:00
Vladimir Milovanović
3c9818024b Bump rocket-dsp-utils. 2023-10-06 09:54:42 +02:00
Vladimir Milovanović
9a9e201507 Bump fixedpoint. 2023-10-06 09:54:42 +02:00
Vladimir Milovanović
6eacd0aa75 Bump dsptools. 2023-10-06 09:54:42 +02:00
abejgonzalez
284f276fbb Remove Dromajo + documentation 2023-09-08 14:28:10 -07:00
Jerry Zhao
5495d05aa0 Bump to latest rocket-chip 2023-08-22 11:28:57 -07:00
Jerry Zhao
65ed3c162c Bump testchipip/barstools 2023-07-31 10:15:56 -07:00
Jerry Zhao
ffae2aa824 Bump dsptools 2023-07-26 11:39:13 -07:00
Jerry Zhao
ef3409f87f Merge remote-tracking branch 'origin/main' into rcbump 2023-07-09 23:31:16 -07:00
Jerry Zhao
77890cead9 Merge pull request #1491 from ucb-bar/barstools-move-iocells
barstools: move iocells to separate project root
2023-07-09 18:22:41 -07:00
Jerry Zhao
078bce1323 Bump to chisel3.6 2023-07-05 10:32:55 -07:00
Vladimir Milovanović
de9d222d67 Bump rocket-dsp-utils for TileLink memory master model fix. 2023-06-23 21:07:35 +02:00
Ethan Wu
63620dab83 update barstools: move iocells to separate project root
Currently Chipyard is including `barstools.iocell` as a separate project
from the rest of barstools, and it does this by creating a new project
rooted at `src` with its source directory rooted at
`src/main/scala/barstools/iocell`. This causes problems for IDEs like
IntelliJ which do not support having one source root from one project
nested inside another source root from a different project.

By breaking out `barstools.iocell` into a separate project root, this
should cause IDEs and similar tools to better understand the project
structure, and makes it so that `iocell` is not in two projects at the
same time.
2023-05-30 19:03:51 -07:00
abejgonzalez
dbe352e9dc Merge remote-tracking branch 'origin/main' into use-fat-jar 2023-05-17 18:12:21 -07:00
Jerry Zhao
8be6d42606 Bump DRAMSim2 to avoid verbose log files 2023-05-09 20:17:17 -07:00
Jerry Zhao
df2e5ad9dc Bump to latest rocket-chip/chisel3.5.6 2023-03-28 16:48:27 -07:00
joonho hwangbo
c2a01ffa7f Merge branch 'main' into use-fat-jar 2023-03-27 19:03:09 -07:00
abejgonzalez
e744f7a20b Remove chisel-testers submodule 2023-03-03 16:50:05 -08:00
abejgonzalez
fd62d9ec2d Fix sbt assembly (remove duplicate classes, fix conflicts) 2023-03-03 15:36:36 -08:00
joonho hwangbo
c0b270853b Remove Duplicate Compiler Flags (#1367)
* Remove Duplicate Compiler Flags

* Cleanup & fixes for MultipleMMIO

* bump barstools

* Update common.mk

* Update common.mk

---------

Co-authored-by: Abraham Gonzalez <abe.j.gonza@gmail.com>
2023-03-01 23:44:05 -08:00
Harrison Liew
14dec6eb71 disallowPackedArrays still broken, but don't need it. Bump barstools. Remove redundanct conda reqs 2023-02-10 14:35:43 -08:00
abejgonzalez
823970ed63 Checkout proper commits of submodules after rebase 2023-02-06 12:38:17 -08:00
abejgonzalez
efb4b7dcbf Fix barstools for 1.29.0 firtool 2023-02-06 12:32:36 -08:00
Harrison Liew
a6342ced21 [skip ci] update some docs, merge VLSI_RTL and VLSI_BB into one 2023-02-06 12:31:00 -08:00
Jerry Zhao
7780ed23bf Bump to scala 2.13.10/chisel 3.5.5/latest rocketchip 2023-01-26 00:12:28 -08:00
joey0320
4f2d791d3c Bump barstools to 06db605902 2023-01-09 10:36:08 -08:00
joey0320
6da72d859b Low FIRRTL flow working
Bump barstools to 06db605902
2023-01-09 10:36:08 -08:00
joey0320
923eee9670 Bump barstools to 899387f4fb 2023-01-09 10:34:27 -08:00
joey0320
4e4696eb3a Bump barstools to d1295e68f8 2023-01-09 10:34:27 -08:00
abejgonzalez
f9b938ad55 Update all 2023-01-09 10:27:07 -08:00
abejgonzalez
a384fa9d1d E2E RocketConfig compile in Verilator 2023-01-09 10:25:27 -08:00
abejgonzalez
ae05fe0de2 Closer [ci skip] 2023-01-09 10:24:46 -08:00
Vladimir Milovanović
f494d9e8b8 Bump rocket-dsp-utils for ShiftRegisterMem fix. (#1298) 2022-12-31 08:34:51 -08:00
abejgonzalez
9f1b87d8ac Bump Verilator + DRAMSim2 for CVA6 fix 2022-09-13 22:52:08 -07:00
abejgonzalez
1de35a6af4 Use conda + Update initial setup docs 2022-08-23 00:44:21 +00:00
Jennifer Zhou
26304b2ab4 point to bootrom copied into build directory 2022-07-20 11:30:54 -07:00
Jennifer Zhou
19eb9f4f6a DROMAJO_ROM variable change 2022-07-11 18:27:02 -07:00
abejgonzalez
cfb55cdffc Bump to master commits 2022-02-10 17:24:54 -08:00
abejgonzalez
40a5f36d50 Rebump FireSim | Bump barstools for updated Chisel 3.5.1 2022-02-08 09:22:17 -08:00
abejgonzalez
a6d656bbbe Try barstools fix 2022-02-02 16:06:41 -08:00
abejgonzalez
e291cd4b7c Bump dsptools/rocket-dsp-utils 2022-01-17 14:25:16 -08:00
abejgonzalez
6b633ad13f Point to IOCells separately | Fixup Hwacha/Sodor more | Use tapeout package 2022-01-17 11:16:15 -08:00
David Biancolin
54447d03c0 Use a temp branch of barstools until 3.5 is in 2021-12-08 16:52:21 +00:00
David Biancolin
6f8a199cf0 Remove chisel3, firrtl. firrt-intp, treadle submodules 2021-12-07 04:58:54 +00:00
John Fang
21a44d7596 Add torture run options to makefile (#992)
* Add torture option to chipyard makefile

* Bump spike to get the signature bug fix
2021-10-01 11:19:43 -07:00
John Wright
346db43361 Update barstools to get the fix in ucb-bar/barstools#104, which uses the correct harness annotation file path (#918) 2021-07-11 17:15:50 -07:00
chick
6677616e12 - Add submodules
- api-config-chipsalliance
  - rocket-dsp-utils
- update check-commit.sh to include rocket-dsp-utils
- changes to build.sbt
  - change rocket-dsptools to rocket-dp-utils
  - add api-config-chipsalliance
2021-06-08 13:05:53 -07:00
abejgonzalez
5b6a2b3fc0 Bump barstools 2021-02-22 11:46:30 -08:00