Richard Yan
ae427a8a2d
vlsi changes
2024-09-22 01:15:38 -07:00
Hansung Kim
8b9fee03bb
vlsi: Add make_syn_f.sh to VLSI_RTL target
...
This script appends Vortex verilog sources & reorders compilation order to
synthesis input config.
2024-07-30 08:05:32 -07:00
Jerry Zhao
39092e9b00
Switch RTL-sim/FPGA/VLSI flows to chisel6
2024-05-13 12:48:06 -07:00
Jerry Zhao
39f28aeaac
Append EXT_FILELISTS to VLSI deps
2024-03-20 13:57:04 -07:00
Øyvind Harboe
99d82673d2
vlsi/Makefile: truncate file SRAM_GENERATOR_CONF
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previously the target would append, not truncate
the file, which could lead to duplicate yaml entries
in that file when the target was re-run.
2024-02-01 07:33:47 +01:00
Nayiri
700057d9eb
changed chiptop dut name, set FSDB=1 when needed
2023-11-13 13:33:24 -08:00
abejgonzalez
b65d8ef6c6
Have global location to store jar files (avoid issue with sbt assembly caching)
2023-05-26 13:14:06 -07:00
abejgonzalez
2997cddc0e
Merge remote-tracking branch 'origin/main' into bump-verilator
2023-05-09 13:27:13 -07:00
joey0320
3f80507ce4
rm split-bb-files.py
2023-04-29 18:21:48 -07:00
abejgonzalez
95349755b5
Support TestDriver.v as top
2023-03-13 11:11:23 -07:00
Harrison Liew
54c55875e1
hierarchical flows should all fall under TOP suffix instead of VLSI_TOP which will change
2023-03-03 14:50:57 -08:00
Harrison Liew
89929cbb6e
cat VLSI_RTL
2023-02-28 13:10:49 -08:00
Harrison Liew
a681bedae0
fix top/model separation for rtl vs. post-syn/par sim
2023-02-24 20:37:36 -08:00
joey0320
a9209c4aaa
Fix TestDriver.v missing from gen-collateral after recompiling
2023-02-21 21:52:03 -08:00
Abraham Gonzalez
632a7a9348
Merge pull request #1349 from ucb-bar/misc-improv
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Small build system improvements
2023-02-16 11:40:55 -08:00
Sagar Karandikar
0c4cfc8742
Fix input files list emission to avoid bash "too many arguments" error
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This makes the expansion of "cat $(VLSI_RTL)" happen as a child of the shell that runs the for loop.
The existing version will sometimes produce a bash "too many arguments" error because the $(shell cat $(VLSI_RTL)) is expanded first and then passed as a giant command to bash.
2023-02-15 17:57:26 -08:00
abejgonzalez
85fe061244
Use EICG_wrapper model as addResource/Path | Fix Makefile parsing
2023-02-15 14:19:55 -08:00
Sagar Karandikar
a998754020
simplify vlsi Makefile a bit
2023-02-15 11:56:52 -08:00
Harrison Liew
83764d3329
[skip ci] add power-rtl and power-syn targets
2023-02-09 13:01:08 -08:00
Harrison Liew
ea65d93c8e
[skip ci] remove need to set site_packages_dir
2023-02-09 10:18:24 -08:00
Harrison Liew
2bfc6e1347
[skip ci] abandon sv2v, Genus happy with patched firtool
2023-02-08 19:00:26 -08:00
Harrison Liew
61d094e887
[skip ci] Add sv2v, sty. Fix Makefile rebuild. Using sv2v, but Yosys still fails.
2023-02-08 16:05:38 -08:00
Harrison Liew
2680f552cf
[skip ci] trying ENABLE_CUSTOM_FIRRTL_PASS=1 for Yosys, clarify init script for private tech plugins
2023-02-06 12:31:39 -08:00
Harrison Liew
223995fb4e
[skip ci] Makefile typo
2023-02-06 12:31:36 -08:00
Harrison Liew
a6342ced21
[skip ci] update some docs, merge VLSI_RTL and VLSI_BB into one
2023-02-06 12:31:00 -08:00
joey0320
9e8812d7fb
Add python file to split top.bb.f & model.bb.f
2023-02-06 12:29:29 -08:00
Harrison Liew
c9cf69d1c0
extra tabs in Makefile
2023-02-06 12:29:29 -08:00
Harrison Liew
22834faa1f
top blackbox isolation hack, bump submodules
2023-02-06 12:29:29 -08:00
Harrison Liew
a9f9f32078
restore sim_files recipe
2023-02-06 12:29:29 -08:00
Harrison Liew
48539353b0
Makefile fixes, but sim still doesn't work
2023-02-06 12:29:29 -08:00
Harrison Liew
22fda3a6a7
initial migration to new Hammer
2023-02-06 12:29:29 -08:00
joey0320
e8e0f3e902
Fix HARNESS_* to MODEL_* for consistence
2023-01-09 10:36:08 -08:00
Odysseas Chatzopoulos
d60d163572
Remove extra parentheses
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Without this change make buildfile Config=SmallBoomConfig fails
2022-10-19 19:56:41 +03:00
Jerry Zhao
d83ba0c19b
Switch to default generating FSDB
2022-10-10 16:20:14 -07:00
nayiri-k
61b8883d09
removing references to nangate45 example
2022-09-28 16:20:29 -07:00
Nayiri K
205895e452
undid some makefile changes
2022-09-27 14:12:53 -07:00
Nayiri K
be7bf0ed5b
changed tabs to spaces in Makefile
2022-09-27 14:06:33 -07:00
Nayiri K
49479754d3
minor tweaks
2022-09-27 14:04:54 -07:00
Nayiri K
205adeef53
new tutorial make variables for ease of use
2022-09-16 00:24:46 -07:00
Nayiri K
1ef194ed29
updated Makefile
2022-09-07 12:01:03 -07:00
Harrison Liew
f16ab3dfa1
Support VCS FGP and BINARY=none
2022-04-05 11:03:44 -07:00
Nayiri K
f54f78504b
sky130 tutorial initial modifications
2022-02-09 13:10:44 -08:00
Harrison Liew
e52081e54f
saif scope fixed with TestDriver, power target needs to get correct waveform
2022-02-03 19:27:52 -08:00
Harrison Liew
cfcb71b808
vlsi Makefile fsdb support
2022-01-28 16:35:33 -08:00
Harrison Liew
f08b22885a
update docs to reflect new tutorial example, remove old dummy DCO stuff
2021-06-06 21:17:55 -07:00
Harrison Liew
a7214e671c
TinyRocketConfig thru par. sim runs, but gl-sim times out.
2021-06-06 20:19:42 -07:00
Harrison Liew
81b57f96bd
hier helper make targets
2021-05-17 14:56:09 -07:00
alonamid
b4403a4b33
Merge remote-tracking branch 'origin/dev' into hammer-docs
2021-01-08 20:11:51 -08:00
Jerry Zhao
8836f84c79
[vlsi] Add USE_SRAM_COMPILER Makefile flag to use memory compiler defined in tech library ( #740 )
2020-12-15 16:49:01 -08:00
Alon Amid
3e4fddbc69
make hammer work according to docs
2020-11-02 22:30:06 +00:00
