Commit Graph

1140 Commits

Author SHA1 Message Date
Colin Schmidt
a255417513 Update stage to use Dependency instead of classof 2020-05-05 15:24:51 -07:00
Colin Schmidt
43f6083b69 Many changes to begin the compilation with RC-1.3
Cores now have an extra CoreParam, useSupervisor which was set to
the default false. Whether a core has supervisor mode is the union
of this and useVM which defaults true so not change was made by this
addition.

BusTopologies are now set with the Config system rather than a system
mixin and so all configs now include the config most similar to the
previous mixin
Testchipip was updated to be able to replace the systembus, in this
new config system, with a ring bus.

The L2 cache repo needed a similar update on how to find the buses.
It currently points to the ucb-bar fork

Treadle is bumped to its release branch
2020-05-05 15:14:24 -07:00
Jerry Zhao
63c46d89c1 Bump sifive-blocks 2020-05-05 13:58:01 -07:00
alonamid
9b94570648 bump rocket chisel (3.3) and firrtl (1.3) 2020-05-05 11:02:28 -07:00
John Wright
794509aba9 [ci skip] Scaladoc and comment fixes (#542) 2020-05-04 14:39:05 -07:00
David Biancolin
df9567b6ea Merge pull request #541 from ucb-bar/sifive-uart-workaround
Bump FireMarshal to disable SiFive uart driver
2020-05-03 22:26:56 -07:00
David Biancolin
356de57580 Bump FireMarshal to disable SiFive uart driver 2020-05-03 14:25:12 -07:00
Colin Schmidt
658e92e951 [docs] Make the link to initial setup stand out. (#533)
* [docs] Make the link to initial setup stand out.
* [docs] Merge the two quick starts
* More descriptive text about the setup link
Co-authored-by: alonamid <alonamid@eecs.berkeley.edu>
2020-05-01 14:23:16 -07:00
Abraham Gonzalez
02367022b0 Fix "WithHeterCoresSetup" in hetero. docs (#537) 2020-04-29 16:25:02 -07:00
Jerry Zhao
24fada1d9c Add WithNoUART fragment (#536) 2020-04-29 01:24:25 -07:00
Howard Mao
959c5a0726 Merge pull request #525 from ucb-bar/unittests
Get icenet and testchipip unit tests working
2020-04-28 16:34:04 -07:00
Howard Mao
94628e78b2 add icenet and testchipip unit tests to CI 2020-04-28 10:34:29 -07:00
Howard Mao
8df43203a2 separate testchipip ClockUtilTests and TestChipUnitTests 2020-04-28 10:32:28 -07:00
Howard Mao
a905dbedcc add make rules for running simulator without executable 2020-04-28 10:32:28 -07:00
Howard Mao
b813caf6fd get icenet and testchipip unit tests working 2020-04-28 10:32:28 -07:00
Abraham Gonzalez
e22ff880e2 [firesim] generate rocket-chip based artefacts (#534) 2020-04-27 20:27:36 -07:00
David Biancolin
b042886d46 Merge pull request #528 from ucb-bar/firesim-scalatest
Make CI use ScalaTest for FireSim
2020-04-27 09:51:02 -07:00
David Biancolin
462f4d0f31 [CI] Disable SBT supershell 2020-04-26 21:11:31 -07:00
David Biancolin
b26ed91b73 [CI] Convert FireSim tests to use ScalaTest 2020-04-26 21:11:31 -07:00
David Biancolin
f30daa4063 [ci] Lengthen hetero tests timeout 2020-04-24 13:33:30 -07:00
Matthias-Raudonis
9d15f2e4e9 Include scripts for dependencies in documentation (#518) 2020-04-24 10:10:31 -07:00
David Biancolin
d5b24a25aa Merge pull request #526 from ucb-bar/misc-sbt-qol
[SBT] Resolve Warnings about Jgit Resolution
2020-04-24 09:55:34 -07:00
David Biancolin
eeafc82d12 Remove ++<scala-version> per Jack's recommendation 2020-04-23 16:30:50 -07:00
David Biancolin
a67461df7a [SBT] Quiet down jgit http warnings 2020-04-23 16:30:37 -07:00
Abraham Gonzalez
7b6a45a6a8 [ci] remove approval button for ci jobs (#521) 2020-04-20 17:08:15 -07:00
KlepD-SAL
e98ebec30d Added note about resource usage during elaboration to docs (#517)
On computers with limited resources (like main memory) the elaboration will fail with the message 'make: *** [firrtl_temp] Error 137'. Since no further explaination of the error is given, its meaning should be mentioned in the docs.
2020-04-20 11:47:59 -07:00
Abraham Gonzalez
8469ce62e1 Revert "[ci] bypass approval button on dev/master (#519)" (#520)
This reverts commit 0035154168.
2020-04-18 17:11:13 -07:00
Abraham Gonzalez
0035154168 [ci] bypass approval button on dev/master (#519) 2020-04-18 17:09:31 -07:00
David Biancolin
e7a8ea4bf4 Merge pull request #503 from ucb-bar/rc-bump-april
Stage / Phase RC Bump
2020-04-18 16:08:24 -07:00
David Biancolin
b303cf6e81 Rocket Chip Stage/Phase Bump (#503)
[WIP] Minimally elaborating design

Bring up a feature-complete Chipyard stage

Pull in Makefrag generation; Bump submodules

Update config generation, and global reset scheme

Bump submodules; clean up

Bump FireSim

Remove some unhygenic comments / WS

Remove the rocketchip subproject

[CI] Lengthen ariane tests timeout

Address some remaining reviewer comments

[firechip] Refresh a Field that cannot be used across repeated instantiations

Bump all submodules
2020-04-18 17:54:27 +00:00
Albert Ou
629a0449d6 toolchains: Bump libgloss for trap handler fix (#516) 2020-04-16 15:43:18 -07:00
Tynan McAuley
24b63c9577 Fix bug in verilator Makefile for 'debug' rule (#513)
The 'debug' rule is currently cleaning out the non-debug-model directory
rather than the debug-model directory. This commit fixes that, and
changes both the debug and non-debug rules to use the variables defined
for referring to these two model directories.

Co-authored-by: Tynan McAuley <tynan@galois.com>
2020-04-15 20:35:56 -07:00
Howard Mao
82d1569d49 Merge pull request #511 from ucb-bar/baremetal-docs
Baremetal docs
2020-04-15 16:12:17 -07:00
Howard Mao
e6ff6874d4 add link to libgloss-htif README 2020-04-15 14:21:12 -07:00
Abraham Gonzalez
a6d9589ed8 [ci] add approval button (#510) 2020-04-15 13:38:49 -07:00
Howard Mao
dc01b4da4b add documentation on baremetal tool flow 2020-04-13 16:31:14 -07:00
Hasan Genc
003bc4afcf Merge pull request #509 from ucb-bar/bump-esp-spike
Bump ESP Spike
2020-04-11 15:27:35 -07:00
alonamid
ada8410ab2 bump esp spike 2020-04-11 12:52:55 -07:00
David Biancolin
4ef3b1a546 Bump FireSim 2020-04-10 22:26:17 +00:00
David Biancolin
b2f5993cfe Merge remote-tracking branch 'origin/dev' into diplomatic-bridges 2020-04-10 22:14:23 +00:00
David Biancolin
543121972d Bump FireSIm 2020-04-10 22:01:00 +00:00
Albert Ou
a5144bc613 Merge pull request #508 from ucb-bar/libgloss
Bump libgloss-htif
2020-04-09 10:04:30 -07:00
Albert Ou
87739a9fe3 toolchains: Bump libgloss for trap handler support 2020-04-08 21:18:06 -07:00
David Biancolin
64d563d493 Bump FireSim for Pow2 fix 2020-04-07 12:04:39 -07:00
David Biancolin
d49c30560c Merge remote-tracking branch 'origin/dev' into diplomatic-bridges 2020-04-06 23:59:19 -07:00
David Biancolin
ba19987984 [firechip] Label FASED instances with an associated memory region name 2020-04-04 18:38:34 -07:00
Jerry Zhao
b9aa6f8cca Merge pull request #504 from ucb-bar/specbump
Bump spec2017 marshal workloads
2020-04-02 09:58:16 -07:00
Jerry Zhao
ea8b3487dc [ci-skip] Bump spec2017 marshal workloads 2020-04-01 22:27:02 -07:00
John Wright
1f98c84210 Add ChipTop to enable real chip configs with IO cells, etc. (#480)
This adds an additional layer (ChipTop) between the System module and the TestHarness. The IOBinder API is now changed to take only a single parameter (an Any) and return a 3 things: The IO port(s), the IO cell(s), and a function to call inside the test harness, which is analogous to the old IOBinder function, except that it takes a TestHarness object as an argument instead of (clock, reset, success).
* A new Top-level module, ChipTop, has been created. ChipTop instantiates a "system" module specified by BuildSystem.
* BuildTop now builds a ChipTop dut module in the TestHarness by default
* A new BuildSystem key has been added, which by default builds DigitalTop (previously just called Top)
* The IOBinders API has changed. IOBinders are now called inside of ChipTop and return a tuple3 of (IO ports, IO cells, harness functions). The harness functions are now called inside the TestHarness (this is analogous to the previous IOBinder functions).
* IO cell models have been included in ChipTop. These can be replaced with real IO cells for tapeout, or used as-is for simulation.
* The default for the TOP make variable is now ChipTop (was Top)
2020-04-01 14:03:56 -07:00
Abraham Gonzalez
3d253c0f67 [make] split up specific make vars/targets into frags (#499)
* [make] split up specific make vars/targets into frags

* [make] move dramsim and max-cycles into SIM_FLAGS

* [misc] move ariane configs to configs/ folder
2020-03-30 17:04:45 -07:00