Commit Graph

1606 Commits

Author SHA1 Message Date
abejgonzalez
a2ebbee2ac Rename Ariane to CVA6 2020-11-04 15:42:30 -08:00
David Biancolin
946a191221 [clocking] Provide a default div for ClockDividerN sv implementation (#706) 2020-11-03 12:14:18 -05:00
David Biancolin
57a0bc5dfc Fix zsh compatibility in init-submodules-no-rv-tools (#705) 2020-11-03 12:14:02 -05:00
Jerry Zhao
37415157d6 Merge pull request #699 from ucb-bar/lazy-iobinders
Support diplomatic IOBinders
2020-11-02 20:14:54 -08:00
Jerry Zhao
2d010b63f3 Merge branch 'dev' into lazy-iobinders 2020-11-02 10:02:44 -08:00
Jerry Zhao
a38596323c Merge pull request #703 from ucb-bar/default-async-reset
Make the ChipTop reset pin always async
2020-10-29 10:34:22 -07:00
Jerry Zhao
7b83da054a Clean up HarnessBinders 2020-10-28 16:18:22 -07:00
Jerry Zhao
f4d70128c0 Remove redundant ChipTop reset synchronizer 2020-10-28 15:37:31 -07:00
Jerry Zhao
93e57ef230 Make the ChipTop reset pin async always 2020-10-26 15:18:34 -07:00
Jerry Zhao
d61b31a6fe Merge pull request #702 from ucb-bar/multirocc-gemmini
Add MultiRoCCGemmini config fragment
2020-10-26 10:03:26 -07:00
Fang, Zitao
4fdb9eb6b0 Merge pull request #647 from ucb-bar/verilator-makefile-fix
Fix Verilator Simulation run-binary-debug Error
2020-10-23 21:54:58 -07:00
Zitao Fang
abbeb2af9e Fixed comments 2020-10-23 17:00:56 -07:00
Zitao Fang
0c4dcffb0d Fixed lowercase p bug 2020-10-23 16:39:56 -07:00
Jerry Zhao
ac19117ec5 Add MultiRoCCGemmini config fragment 2020-10-23 15:41:49 -07:00
Jerry Zhao
7a55c55aa3 Fix no-MBUS configs 2020-10-20 01:12:28 -07:00
Jerry Zhao
e0bf907a06 Merge remote-tracking branch 'origin/dev' into lazy-iobinders 2020-10-19 13:22:01 -07:00
David Biancolin
a3c0e3a0b2 Merge pull request #690 from ucb-bar/diplomatic-clocks-mbus-crossing
DRAM In A Separate Domain Take 2
2020-10-19 15:15:09 -04:00
Jerry Zhao
f3d666d2b7 Clarify HarnessBinders ClassTag naming 2020-10-19 10:16:44 -07:00
Jerry Zhao
11fdf69544 Merge pull request #693 from ucb-bar/smartelf2hex-memsiz
Update smartelf2hex to use MemSiz instead of FileSiz
2020-10-19 09:05:50 -07:00
David Biancolin
c5e3ad0a01 Bump tcip and fsim 2020-10-19 15:32:48 +00:00
Jerry Zhao
035e2e4315 Add test for make TOP=DigitalTop 2020-10-17 22:55:07 -07:00
Jerry Zhao
9927231bc4 Support lazy-iobinders 2020-10-17 22:47:50 -07:00
David Biancolin
1b94e7f10c Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-mbus-crossing 2020-10-16 23:21:20 +00:00
alonamid
46ea900538 Merge pull request #695 from ucb-bar/shared-configs
Have FireSim build recipes use Chipyard configs rather than FireChip configs
2020-10-16 14:28:35 -07:00
Alon Amid
8de7aa8d69 bump firesim 2020-10-16 18:18:35 +00:00
Alon Amid
6eaac63e1b address PR comments 2020-10-16 06:34:26 +00:00
David Biancolin
f3e1cb434d Merge pull request #696 from ucb-bar/no-default-core-fame-models
Don't annotate cores with FAMEModelAnnotations
2020-10-15 18:03:27 -04:00
Albert Magyar
84e0bf7338 Don't annotate cores with FAMEModelAnnotations 2020-10-15 12:25:39 -07:00
David Biancolin
b747116363 Bump FireSim 2020-10-15 11:28:44 -07:00
David Biancolin
74c1c9d7ab Punch out reset in AXI4MMIO IOBinder 2020-10-15 11:28:36 -07:00
Alon Amid
fd4a70dfb6 docs typos 2020-10-15 18:04:31 +00:00
Alon Amid
6479d54f53 bump firesim 2020-10-15 17:53:25 +00:00
Alon Amid
c7a197d79a docs 2020-10-15 17:51:28 +00:00
Alon Amid
20d3b9f9ce bump firesim 2020-10-15 17:08:06 +00:00
Alon Amid
2c935b4ad7 pull firesim mem model config into firesim tweaks 2020-10-15 17:07:51 +00:00
Alon Amid
4a317b0cab differentiate default config package delimiter 2020-10-15 17:07:20 +00:00
David Biancolin
9c8d2948af [firechip] Fix a broken config 2020-10-14 15:33:32 -07:00
David Biancolin
6aefb73ab5 Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-mbus-crossing 2020-10-14 15:29:00 -07:00
David Biancolin
5f488bc068 Bump FireSim for multiclock FAME1 xform fix 2020-10-14 14:44:48 -07:00
David Biancolin
211c33f996 Address comments in #690 2020-10-14 14:42:45 -07:00
Jerry Zhao
d958b8e1aa [ci skip] Update smartelf2hex to use MemSiz instead of FileSiz
elf2hex writes zeros to a segment for which MemSize > FileSize, which adheres to the ELF spec.
Thus, we should calculate the total size of the file from the MemSize of the last segment, rather than the FileSize.
2020-10-12 17:48:08 -07:00
Jerry Zhao
8f86b6d19a Merge pull request #683 from ucb-bar/unify-fesvr
Unify htif implementation with firesim
2020-10-12 11:17:23 -07:00
Jerry Zhao
0c46ed1676 Rename testchip_fesvr to testchip_tsi 2020-10-09 09:34:20 -07:00
Jerry Zhao
25129c27ca Add testchip_fesvr to uncondtionally used resources 2020-10-09 09:27:58 -07:00
Jerry Zhao
d71c3b6357 Unify htif implementation with firesim 2020-10-09 09:27:58 -07:00
David Biancolin
986b5831c8 [clocking] Sketch out a topology that puts the MBUS is a separate domain 2020-10-09 07:23:17 -07:00
David Biancolin
30b278687b [clocking] Also aggregate clocks in AsyncClockGroup 2020-10-09 07:13:55 -07:00
Jerry Zhao
b583276d1e Merge pull request #682 from ucb-bar/clocking-features
Add tile-reset control registers | multiclock fixes
2020-10-08 14:39:53 -07:00
Nathan Pemberton
bf8dbaa297 Merge pull request #689 from ucb-bar/bumpMarshal1.10
Bump firemarshal to v1.10.0
2020-10-08 11:07:23 -07:00
Nathan Pemberton
399b909dec Bump firemarshal to v1.10.0 2020-10-07 20:50:26 -04:00