abejgonzalez
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d0e5a40687
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slightly more clarity in the diplomacy example [skip ci]
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2019-09-25 20:02:16 -07:00 |
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Abraham Gonzalez
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7cfac672c1
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Update docs/Chipyard-Basics/Configs-Parameters-Mixins.rst [skip ci]
Co-Authored-By: Jerry Zhao <jerryz123@berkeley.edu>
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2019-09-25 19:34:47 -07:00 |
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Howard Mao
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2f3c87dade
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add explanation of LazyModule vs. LazyModuleImp [skip ci]
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2019-09-25 17:25:38 -07:00 |
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Howard Mao
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9dc0abb485
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explain how to add IceNet and TestChipIP hardware to design
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2019-09-25 16:41:32 -07:00 |
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Howard Mao
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c8e8465180
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add Test Chip IP section [ci skip]
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2019-09-25 13:02:44 -07:00 |
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Howard Mao
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12d4e7d837
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add section on IceNet [ci skip]
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2019-09-25 13:02:38 -07:00 |
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Howard Mao
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0168c8f841
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Merge pull request #245 from ucb-bar/master
Merge master back to dev
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2019-09-26 01:00:35 +08:00 |
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Abraham Gonzalez
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148421bcab
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Merge pull request #243 from ucb-bar/abe-doc-updates
small doc clarifications + cleanup
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2019-09-20 18:02:28 -07:00 |
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abejgonzalez
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fd6d3272e4
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add quotes around core/tile [skip ci]
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2019-09-20 18:00:11 -07:00 |
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abejgonzalez
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898f0fd2d4
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cleanup grammar a bit [skip ci]
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2019-09-20 17:51:46 -07:00 |
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abejgonzalez
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ff992ef24e
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add hart of 2 to heter explanation | footnote about tile v core [skip ci]
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2019-09-20 17:36:53 -07:00 |
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abejgonzalez
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edaf99ca9a
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small clarifications + cleanup [skip ci]
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2019-09-20 12:25:23 -07:00 |
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Jerry Zhao
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37b934236a
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Merge pull request #241 from ucb-bar/no_unify
Replace UnifiedBoomConfig with SmallRv32BoomConfig
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2019-09-20 10:41:05 -07:00 |
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Jerry Zhao
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26042b682c
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Replace UnifiedBoomConfig with SmallRv32BoomConfig
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2019-09-17 15:36:56 -07:00 |
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Jerry Zhao
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a77226cdba
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Merge pull request #240 from ucb-bar/order-fix
Fix Sha3RocketConfig ordering
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2019-09-16 16:01:51 -07:00 |
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Jerry Zhao
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17f1387846
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Fix Sha3RocketConfig ordering
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2019-09-16 15:54:32 -07:00 |
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Howard Mao
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cfb14f26e4
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Merge pull request #235 from ucb-bar/howie-docs
Updates and additions to documentation
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2019-09-17 06:03:01 +08:00 |
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Jerry Zhao
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6c26b447cc
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Merge pull request #238 from ucb-bar/vcs-vpd-fix
Make .vpd rules generate the .out as well
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2019-09-16 10:59:46 -07:00 |
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Howard Mao
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99fa21348c
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move image to _static directory
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2019-09-16 10:28:05 -07:00 |
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Howard Mao
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6465d9c591
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move NodeTypes code to scala source
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2019-09-16 10:25:10 -07:00 |
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Howard Mao
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f96a70fc61
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fix another instance of broken references
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2019-09-16 10:21:10 -07:00 |
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David Biancolin
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fce25f4486
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Merge pull request #239 from ucb-bar/remove-published-deps
Remove Berkeley-Managed Library Dependencies from Subprojects
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2019-09-13 11:22:24 -07:00 |
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Jerry Zhao
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ce94ca7840
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Fix Makefile .vpd rules not generating .out
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2019-09-13 01:52:23 -07:00 |
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David Biancolin
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95ae46f4f2
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[sbt] Use tools/chisel3 not rocketchip/chisel3
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2019-09-12 20:32:33 -07:00 |
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David Biancolin
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16cc565238
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[sbt] Purge berkeley library dependencies from all subprojects
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2019-09-12 20:32:26 -07:00 |
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Howard Mao
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e68536a852
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add Google Group to the index
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2019-09-12 18:14:39 -07:00 |
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Howard Mao
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d5bccc0455
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add additional example code as literalincludes
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2019-09-12 18:08:45 -07:00 |
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Howard Mao
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6ae60b94c6
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correct capitalization in Adding an Accelerator/Device
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2019-09-12 17:56:12 -07:00 |
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Howard Mao
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9a8d6c908f
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fix verilator invocation in Adding an Accelerator
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2019-09-12 17:54:08 -07:00 |
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Howard Mao
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2d717bfcae
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add documentation code snippets to example project
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2019-09-12 17:35:40 -07:00 |
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David Biancolin
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36b7944cb6
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Merge pull request #230 from ucb-bar/midas2-merge
[firesim] Initial Golden Gate support
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2019-09-12 17:17:54 -07:00 |
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Howard Mao
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f31f629505
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replace broken :numref:
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2019-09-12 17:05:47 -07:00 |
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Howard Mao
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a71153a94d
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fix some reference in Chipyard Components
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2019-09-12 16:57:11 -07:00 |
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Howard Mao
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19a61b3c1a
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document return values of edge methods
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2019-09-12 16:12:35 -07:00 |
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David Biancolin
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173743be6d
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[sbt] Remove the firrtl subproject
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2019-09-12 15:41:50 -07:00 |
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Howard Mao
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bc903b8407
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more on customization of L1
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2019-09-12 14:34:57 -07:00 |
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Howard Mao
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069bb55442
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a bit more explanation of site, here, up
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2019-09-12 14:26:51 -07:00 |
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Howard Mao
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c6f6b2e117
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mention address of BootROM and first instruction
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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200fec07e6
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make purpose of CachelessRocketConfig clearer
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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9bb4215c7d
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add changes Alon requested
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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714d79e87d
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fix a AXI4UserYanker reference
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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cf5d64f8c8
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fix Diplomacy Connectors symbols
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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646d7cba4c
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use literalinclude directive to pull source directly from example package
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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fd5e0024a7
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capitalize Diplomacy when used as a name
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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1fee2b12f1
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fix some language about TileLink's relationship to Diplomacy
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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a4371fa917
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add section on SoC boot process
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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753788ad67
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add documentation on TileLink/AXI4 diplomatic widgets
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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e9bce0fc3d
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clarification of AddressRange arguments
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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334e443003
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add part about AXI4RegisterNode
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2019-09-11 12:13:08 -07:00 |
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Howard Mao
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0e8dc833b8
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write Register Router documentation
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2019-09-11 12:13:08 -07:00 |
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