Blaise Tine
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3bbaea1332
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project directories restructuring
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2020-04-14 08:24:49 -04:00 |
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Blaise Tine
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fc155e1223
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project directories reorganization
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2020-04-14 06:35:20 -04:00 |
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Blaise Tine
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1de06fd9c0
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update
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2020-04-13 07:40:51 -04:00 |
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Blaise Tine
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dd1ba977c6
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update opencl benchmakr kernel compilation steps
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2020-04-13 07:37:35 -04:00 |
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Blaise Tine
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97a31401f7
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rename driver dummy to stub
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2020-04-10 22:40:58 -04:00 |
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Blaise Tine
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217dfb48ef
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adding README for OPAE hw
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2020-04-08 11:44:06 -04:00 |
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Blaise Tine
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809b4ded5d
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-06 10:31:00 -04:00 |
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Blaise Tine
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6753f8e1b5
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POCL llvm path settings via env
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2020-04-06 10:30:38 -04:00 |
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codetector
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d680f72997
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add export_cycle_counts.py to parse run_tests.sh outputs directory
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2020-04-06 04:08:57 +00:00 |
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wgulian3
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3bcb7b0e83
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Add synthesized configuration statistics
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2020-04-05 23:33:59 -04:00 |
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codetector
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829042f472
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add test runner script to run rtlsim benchmarks
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2020-04-06 01:54:33 +00:00 |
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wgulian3
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8d4d07d56b
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Switch the script based build config generation
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2020-04-05 19:59:40 -04:00 |
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wgulian3
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0270fce6d3
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Add config generation script
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2020-04-05 19:41:39 -04:00 |
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codetector
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e99697c136
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Merge branch 'fpga_synthesis' of github.gatech.edu:casl/Vortex into fpga_synthesis
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2020-04-05 19:16:10 -04:00 |
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Blaise Tine
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e9052259fb
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-05 18:09:43 -04:00 |
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Blaise Tine
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adf8e7dcd5
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allow external path for llvm loc in opencl compiler
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2020-04-05 18:09:23 -04:00 |
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fares
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7e8a1a6698
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Added Fix so ecall can terminate sim (Temp until we recompile kernels)
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2020-04-05 17:16:47 -04:00 |
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codetector
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dc5a4604cf
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Merge branch 'fpga_synthesis' of github.gatech.edu:casl/Vortex into fpga_synthesis
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2020-04-05 16:38:47 -04:00 |
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felsabbagh3
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6d18bb990b
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-05 01:23:50 -07:00 |
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felsabbagh3
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93922bb2e9
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Removed reset on Data/Tag structures
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2020-04-05 01:23:33 -07:00 |
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Blaise Tine
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154b118d70
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minor updates
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2020-04-05 01:18:42 -07:00 |
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Blaise Tine
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30770b5026
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minor updates
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2020-04-05 01:16:54 -07:00 |
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felsabbagh3
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5b633bca61
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FIX
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2020-04-05 00:17:02 -07:00 |
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felsabbagh3
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91a926e3b6
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-04 22:59:17 -07:00 |
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felsabbagh3
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913670a7bb
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Fixed Dependancy List in VX_alu that doesn't update when multiply is ready
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2020-04-04 22:56:31 -07:00 |
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Blaise Tine
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18f1350fdf
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update
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2020-04-05 01:38:11 -04:00 |
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Blaise Tine
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256dec4768
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changing demo to use addition
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2020-04-05 01:32:57 -04:00 |
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felsabbagh3
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9b989cec69
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Fixed use before init
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2020-04-04 18:41:25 -07:00 |
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felsabbagh3
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165836332c
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Fixed snp delay for sm
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2020-04-04 18:21:25 -07:00 |
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felsabbagh3
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bcea9866a7
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Fixed a couple of things
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2020-04-04 18:20:06 -07:00 |
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felsabbagh3
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d0765b8fb1
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Now Flush Routine only sends one round of snoops
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2020-04-04 18:02:57 -07:00 |
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felsabbagh3
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65fa9285bf
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Fixed Flushing and Prefetching
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2020-04-04 17:57:35 -07:00 |
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felsabbagh3
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a7a1906bea
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-04 10:14:24 -07:00 |
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felsabbagh3
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70bd673031
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Resseting GPR
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2020-04-04 10:13:26 -07:00 |
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Blaise Tine
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0a8d829f15
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basic test update
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2020-04-04 09:07:04 -04:00 |
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Blaise Tine
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07ec0ef344
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OPAE hw snooping fixes
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2020-04-04 05:07:45 -07:00 |
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Blaise Tine
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1f63139ce5
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fix RTL code undefined variables
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2020-04-03 22:59:40 -07:00 |
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Blaise Tine
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41f3245376
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enable Vortex compiler to support using environment path
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2020-04-03 20:24:57 -04:00 |
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Blaise Tine
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5e54bdffe9
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POCL compiler with relative path
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2020-04-03 17:47:55 -04:00 |
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codetector
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621e0b2a25
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Merge branch 'fpga_synthesis' of github.gatech.edu:casl/Vortex into fpga_synthesis
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2020-04-03 15:06:58 -04:00 |
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Blaise Tine
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6ae9a6732b
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-03 15:04:15 -04:00 |
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codetector
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9ee12d4a01
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Merge branch 'fpga_synthesis' of github.gatech.edu:casl/Vortex into fpga_synthesis
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2020-04-03 14:36:52 -04:00 |
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felsabbagh3
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10e445d459
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Provisioned Prefetching, currently disabled
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2020-04-03 00:30:33 -07:00 |
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Blaise Tine
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c05ea79afa
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-03 00:13:46 -04:00 |
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Blaise Tine
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66a879608e
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udpated OpenCL runtime to include cache flushing
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2020-04-03 00:13:24 -04:00 |
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felsabbagh3
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8ad75e0442
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-02 20:26:46 -07:00 |
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felsabbagh3
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7d1cc5234e
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Fixed dram_fill_accept dependant on input address
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2020-04-02 20:26:37 -07:00 |
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Blaise Tine
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ee77c76785
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Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis
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2020-04-02 20:09:20 -07:00 |
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Blaise Tine
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f590d6acc8
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minor update
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2020-04-02 20:09:08 -07:00 |
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felsabbagh3
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8c1b72691f
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Updated head location to 9-a
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2020-04-02 19:41:53 -07:00 |
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