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Bump vortex with multi-warp tensor core fix

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Hansung Kim
2024-05-25 20:13:56 -07:00
parent 114dd75f2f
commit 09d9d3c3f9
2 changed files with 4 additions and 2 deletions
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2
src/main/resources/vsrc/vortex

Submodule src/main/resources/vsrc/vortex updated: 45d86b26a2...864265bda5

4
src/main/scala/radiance/memory/VortexCache.scala
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@@ -127,7 +127,9 @@ class VortexBankPassThrough(config: VortexL1Config)(implicit p: Parameters)
// hack due to not doing proper param negotiations across disconnected
// Diplomacy graphs.
// println(s"${upstream.params.sourceBits} <= ${downstream.params.sourceBits}")
require(upstream.params.sourceBits <= downstream.params.sourceBits)
require(upstream.params.sourceBits <= downstream.params.sourceBits,
"mem-side source of L1 cache truncates core-side source! " +
"Try lowering core or coalescer srcIds")
downstream.a <> upstream.a
upstream.d <> downstream.d