Commit Graph

1098 Commits

Author SHA1 Message Date
Blaise Tine
1f63f9da25 new fpu implementation 2020-07-24 00:00:37 -04:00
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f83521b7c6 add fpnew 2020-07-23 06:30:10 -04:00
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13fcdfc553 add fpnew 2020-07-23 06:23:05 -04:00
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d0e70fa1db add fpnew 2020-07-23 06:20:43 -04:00
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75e3c31b56 fpu implementation (part1) 2020-07-23 03:18:09 -07:00
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6836f397f8 adding pulp fpu_div_sqrt_mvp submodule 2020-07-21 08:24:02 -07:00
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0a56f96e69 scheduler optimization 2020-07-21 08:28:05 -07:00
Blaise Tine
fb44de8017 fixed simulator leak 2020-07-21 06:17:41 -07:00
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ff7f65bd1f opae build fixes 2020-07-21 05:44:13 -07:00
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dc7efbcfb4 pipeline refactoring 2020-07-21 05:22:47 -04:00
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e2100e9e87 pipeline refactoring 2020-07-20 09:38:54 -04:00
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577a5791dc pipeline refactoring 2020-07-20 08:04:04 -04:00
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25f66e6490 pipeline refactoring 2020-07-19 05:03:47 -04:00
Blaise Tine
9cf8bf6149 pipereg refactoring 2020-07-10 19:31:40 -04:00
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bdfacf709c yosys synthesis refactoring 2020-07-10 18:56:41 -04:00
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77c3b2d45f lsu_unit refactoring to reduce critical path 2020-07-10 11:23:34 -07:00
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bca36e213e interfaces refactoring 2020-07-02 20:43:52 -07:00
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a5f4eb3d13 interfaces refactoring 2020-07-02 19:44:32 -07:00
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c5a64a0eed interfaces refactoring 2020-07-02 19:31:55 -07:00
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ba43e2d33a LKG FPGA build - Passed basic, demo, vecadd kernels 2020-07-01 09:39:53 -07:00
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5d088d67c8 Gather FPGA perf stats 2020-07-01 09:30:12 -07:00
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e92029c31a simX cleanup 2020-06-30 20:51:09 -07:00
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9d1762e5e5 reverting stall_gpr_csr 2020-06-30 18:27:37 -07:00
Blaise Tine
18fe9cba30 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-30 18:20:59 -07:00
Blaise Tine
83a1695c73 OPAE CSR access 2020-06-30 18:14:06 -07:00
felsabbagh3
7d5ed7ac5f Removed stall dependancy on csr_req_if_valid 2020-06-30 12:03:55 -07:00
Blaise Tine
582a00d690 adding OPAE CSR support 2020-06-30 10:05:57 -07:00
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1f5c4bf617 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-30 00:08:44 -07:00
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2de61b5982 get device caps from CSRs 2020-06-30 00:08:23 -07:00
felsabbagh3
d7ef5f0bd7 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-29 23:00:53 -07:00
felsabbagh3
b8e8cab1ee Added CSR IO req/rsp V0.1 2020-06-29 23:00:34 -07:00
Blaise Tine
f66c251309 minor update 2020-06-29 15:09:14 -07:00
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75d66dc335 fix sources.txt, run_ase.sh 2020-06-29 12:52:28 -07:00
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f0046fed3c added synthesis for Vortex single core 2020-06-29 08:39:57 -07:00
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6e22e59b00 update README 2020-06-29 08:29:51 -07:00
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9e2ae9a9a8 update README 2020-06-29 08:21:32 -07:00
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bc894e1247 update README 2020-06-29 08:17:22 -07:00
Blaise Tine
a70562d386 set target synthesis freq=200 MHz, set 4-cores as default config, MULT.latency=1, DIV.latency=18 2020-06-29 08:03:19 -07:00
Blaise Tine
d33916f1e0 minor update 2020-06-29 00:38:59 -07:00
felsabbagh3
0b7a869470 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-29 00:04:13 -07:00
felsabbagh3
14e4fd95b7 Don't allow snrq scheduling if there's a valid reqq entry (Event if it can't be scheduled) 2020-06-29 00:03:36 -07:00
Blaise Tine
b7541a3172 adding built kernels 2020-06-29 02:01:51 -04:00
Blaise Tine
21e04a0cb0 minor update 2020-06-28 22:58:18 -07:00
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97668bf6f6 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-28 22:28:12 -07:00
Blaise Tine
7594067023 update 2020-06-28 21:50:24 -07:00
Blaise Tine
24aabd49d1 update 2020-06-28 21:49:15 -07:00
felsabbagh3
e919e452b9 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-28 20:01:49 -07:00
felsabbagh3
21566cdcd7 Fixed Single Core with Optimizations 2020-06-28 19:38:36 -07:00
Blaise Tine
d89931d564 minor fix 2020-06-28 18:56:22 -07:00
Blaise Tine
dfd183a1bb Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-28 15:36:39 -07:00