Commit Graph

846 Commits

Author SHA1 Message Date
Blaise Tine
31f906f9fd fixed all build warnings 2020-04-16 10:22:46 -04:00
Blaise Tine
81745f08c9 added config.vh 2020-04-16 07:49:19 -04:00
Blaise Tine
c913e542e9 adding POCL Dockerfile 2020-04-14 19:46:53 -04:00
Blaise Tine
12dc4d6874 refactoring fixes 2020-04-14 19:39:59 -04:00
Blaise Tine
22c8da7490 renamed Vortex_SOC to Vortex_Socket 2020-04-14 08:33:32 -04:00
Blaise Tine
c132149801 minor update 2020-04-14 08:27:37 -04:00
Blaise Tine
c88af7889c remove temp files 2020-04-14 08:26:12 -04:00
Blaise Tine
3bbaea1332 project directories restructuring 2020-04-14 08:24:49 -04:00
Blaise Tine
fc155e1223 project directories reorganization 2020-04-14 06:35:20 -04:00
Blaise Tine
1de06fd9c0 update 2020-04-13 07:40:51 -04:00
Blaise Tine
dd1ba977c6 update opencl benchmakr kernel compilation steps 2020-04-13 07:37:35 -04:00
Blaise Tine
97a31401f7 rename driver dummy to stub 2020-04-10 22:40:58 -04:00
Blaise Tine
217dfb48ef adding README for OPAE hw 2020-04-08 11:44:06 -04:00
Blaise Tine
809b4ded5d Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis 2020-04-06 10:31:00 -04:00
Blaise Tine
6753f8e1b5 POCL llvm path settings via env 2020-04-06 10:30:38 -04:00
codetector
d680f72997 add export_cycle_counts.py to parse run_tests.sh outputs directory 2020-04-06 04:08:57 +00:00
wgulian3
3bcb7b0e83 Add synthesized configuration statistics 2020-04-05 23:33:59 -04:00
codetector
829042f472 add test runner script to run rtlsim benchmarks 2020-04-06 01:54:33 +00:00
wgulian3
8d4d07d56b Switch the script based build config generation 2020-04-05 19:59:40 -04:00
wgulian3
0270fce6d3 Add config generation script 2020-04-05 19:41:39 -04:00
codetector
e99697c136 Merge branch 'fpga_synthesis' of github.gatech.edu:casl/Vortex into fpga_synthesis 2020-04-05 19:16:10 -04:00
Blaise Tine
e9052259fb Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis 2020-04-05 18:09:43 -04:00
Blaise Tine
adf8e7dcd5 allow external path for llvm loc in opencl compiler 2020-04-05 18:09:23 -04:00
fares
7e8a1a6698 Added Fix so ecall can terminate sim (Temp until we recompile kernels) 2020-04-05 17:16:47 -04:00
codetector
dc5a4604cf Merge branch 'fpga_synthesis' of github.gatech.edu:casl/Vortex into fpga_synthesis 2020-04-05 16:38:47 -04:00
felsabbagh3
6d18bb990b Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis 2020-04-05 01:23:50 -07:00
felsabbagh3
93922bb2e9 Removed reset on Data/Tag structures 2020-04-05 01:23:33 -07:00
Blaise Tine
154b118d70 minor updates 2020-04-05 01:18:42 -07:00
Blaise Tine
30770b5026 minor updates 2020-04-05 01:16:54 -07:00
felsabbagh3
5b633bca61 FIX 2020-04-05 00:17:02 -07:00
felsabbagh3
91a926e3b6 Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis 2020-04-04 22:59:17 -07:00
felsabbagh3
913670a7bb Fixed Dependancy List in VX_alu that doesn't update when multiply is ready 2020-04-04 22:56:31 -07:00
Blaise Tine
18f1350fdf update 2020-04-05 01:38:11 -04:00
Blaise Tine
256dec4768 changing demo to use addition 2020-04-05 01:32:57 -04:00
felsabbagh3
9b989cec69 Fixed use before init 2020-04-04 18:41:25 -07:00
felsabbagh3
165836332c Fixed snp delay for sm 2020-04-04 18:21:25 -07:00
felsabbagh3
bcea9866a7 Fixed a couple of things 2020-04-04 18:20:06 -07:00
felsabbagh3
d0765b8fb1 Now Flush Routine only sends one round of snoops 2020-04-04 18:02:57 -07:00
felsabbagh3
65fa9285bf Fixed Flushing and Prefetching 2020-04-04 17:57:35 -07:00
felsabbagh3
a7a1906bea Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis 2020-04-04 10:14:24 -07:00
felsabbagh3
70bd673031 Resseting GPR 2020-04-04 10:13:26 -07:00
Blaise Tine
0a8d829f15 basic test update 2020-04-04 09:07:04 -04:00
Blaise Tine
07ec0ef344 OPAE hw snooping fixes 2020-04-04 05:07:45 -07:00
Blaise Tine
1f63139ce5 fix RTL code undefined variables 2020-04-03 22:59:40 -07:00
Blaise Tine
41f3245376 enable Vortex compiler to support using environment path 2020-04-03 20:24:57 -04:00
Blaise Tine
5e54bdffe9 POCL compiler with relative path 2020-04-03 17:47:55 -04:00
codetector
621e0b2a25 Merge branch 'fpga_synthesis' of github.gatech.edu:casl/Vortex into fpga_synthesis 2020-04-03 15:06:58 -04:00
Blaise Tine
6ae9a6732b Merge branch 'fpga_synthesis' of https://github.gatech.edu/casl/Vortex into fpga_synthesis 2020-04-03 15:04:15 -04:00
codetector
9ee12d4a01 Merge branch 'fpga_synthesis' of github.gatech.edu:casl/Vortex into fpga_synthesis 2020-04-03 14:36:52 -04:00
felsabbagh3
10e445d459 Provisioned Prefetching, currently disabled 2020-04-03 00:30:33 -07:00