Commit Graph

2755 Commits

Author SHA1 Message Date
abejgonzalez
292cc753ce Run pre-commit on all files 2022-12-21 15:59:46 -08:00
abejgonzalez
d63c3cb72e Add pre-commit support 2022-12-21 15:58:51 -08:00
Abraham Gonzalez
e32069eb2a Merge pull request #1292 from ucb-bar/init-fpga
Init FPGA submodules in build-setup.sh
2022-12-20 18:44:35 -07:00
abejgonzalez
b6d6ea6db1 Init FPGA submodules in build-setup.sh 2022-12-20 11:02:07 -08:00
Abraham Gonzalez
89dbfae9a6 Merge pull request #1288 from tymcauley/tsi-sim-exit
Fail simulations on TSI errors
2022-12-15 13:59:07 -08:00
Jerry Zhao
858ca32b5e Switch simulators to C++17. (#1285) 2022-12-15 10:21:39 -08:00
Abraham Gonzalez
8e851b0285 Merge pull request #1278 from Lorilandly/vc707fpga
Add support for VC707 FPGA board changelog:added
2022-12-14 19:16:49 -08:00
Tynan McAuley
06532a06ef Bump testchipip to fail simulations on TSI errors 2022-12-15 00:16:25 +00:00
Lori Li
5c55614115 update CI list 2022-12-14 14:03:44 +09:00
Abraham Gonzalez
cb56f8f8f9 Merge pull request #1284 from ucb-bar/bump-firemarshal
Bump FireMarshal
2022-12-13 15:42:00 -08:00
Lori Li
0b58274b22 Added CI checks 2022-12-13 17:41:59 +09:00
Haoan Li
dab5720445 expose functional pins and ports 2022-12-13 16:53:31 +09:00
Abraham Gonzalez
e51c006077 Merge pull request #1282 from ucb-bar/full-setup
Rework build-setup | Add single-node CI
2022-12-12 17:03:59 -08:00
abejgonzalez
6802173b54 Bump FireMarshal 2022-12-12 14:55:21 -08:00
abejgonzalez
1b12c6adf6 Rename to run_step | Add comments 2022-12-12 14:42:29 -08:00
Abraham Gonzalez
ef6093a03c Merge pull request #1266 from ucb-bar/no-conda
Remove conda from build-toolchains-extra.sh
2022-12-12 14:32:12 -08:00
abejgonzalez
a0ad9d2055 Remove need for conda in build-toolchains-extra.sh 2022-12-12 10:56:54 -08:00
abejgonzalez
a8d99eb6f7 Avoid clashing env. names 2022-12-12 10:33:17 -08:00
Hasan Genc
6614b29025 Bump Gemmini to v0.7 (#1276) 2022-12-10 14:37:45 -08:00
abejgonzalez
5996ec69a5 Rework build-setup | Add single-node CI 2022-12-09 17:33:41 -08:00
Jerry Zhao
43b75640cc Decoupled sbus width from boom|hwacha|gemmini memory interface widths (#1273) 2022-12-08 09:51:46 -08:00
Jerry Zhao
927bd6fc80 Move build-setup script to correct directory (#1271) 2022-12-08 09:51:30 -08:00
-T.K.-
1b7457d2fc FIX: fix Arty FPGA reset signal (#1257) 2022-12-07 19:34:35 -08:00
Lori Li
0724431873 Clean up code 2022-11-30 16:56:09 +09:00
Lori Li
a2d1f16488 revert module imp && fix for 4gb ram 2022-11-30 03:51:56 +09:00
Haoan Li
37f2578f6c Bump fpga-shells version 2022-11-24 16:18:03 +09:00
Haoan Li
fb793d7ee9 Add support for VC707 fpga board 2022-11-24 16:08:15 +09:00
Jerry Zhao
6929ea0165 Revert "fix: S-interpolator for assert, assume and printf (#1242)" (#1272)
This reverts commit dbfa8b03f1.
2022-11-22 14:30:31 -08:00
SingularityKChen
dbfa8b03f1 fix: S-interpolator for assert, assume and printf (#1242) 2022-11-22 01:23:09 -08:00
SingularityKChen
4ba9ddd120 fix: remove RocketTilesKey (#1264) 2022-11-22 01:22:34 -08:00
PisonJay
757d354410 Fix typo in Initial-Repo-Setup.rst (#1269) 2022-11-15 13:27:38 -08:00
Harrison Liew
70cbc511db Merge pull request #1261 from odxa20/patch-1
Remove extra parenthesis
2022-10-19 10:10:30 -07:00
Odysseas Chatzopoulos
d60d163572 Remove extra parentheses
Without this change make buildfile Config=SmallBoomConfig fails
2022-10-19 19:56:41 +03:00
Sagar Karandikar
004297b6a8 Merge pull request #1260 from ucb-bar/run-ci
Test conda lock for RTD
2022-10-18 19:07:06 -07:00
Abraham Gonzalez
bdeb496eea Test conda lock for RTD 2022-10-18 18:59:32 -07:00
Sagar Karandikar
3bc56ac81a Merge pull request #1258 from ucb-bar/fix-open-files-limit-and-fsim
fix open files issue and bump firesim with various fixes
2022-10-18 18:06:38 -07:00
Sagar Karandikar
640d159499 Merge branch 'main' into fix-open-files-limit-and-fsim 2022-10-18 15:41:09 -07:00
Sagar Karandikar
25efec39e0 bump to FireSim 1.15.1 release 2022-10-18 15:40:28 -07:00
Sagar Karandikar
518116bb28 Update CHANGELOG.md 2022-10-18 15:35:49 -07:00
Sagar Karandikar
fcd087944f bump firesim 2022-10-17 21:52:28 -07:00
Sagar Karandikar
a5acc569df bump firesim 2022-10-17 21:38:29 -07:00
joonho hwangbo
33f5040b5d Integrate Mempress memory tester (#1253) 2022-10-17 18:41:39 -07:00
Sagar Karandikar
301f5519e9 fix first clone script conda setup 2022-10-16 22:20:12 -07:00
Sagar Karandikar
b2451d2f27 .gitignore first-clone-setup-fast-log 2022-10-16 20:27:50 -07:00
Sagar Karandikar
7f886abb4d add first clone convenience script 2022-10-16 20:25:10 -07:00
Sagar Karandikar
b659a3ed6a update repo-clean.sh script. actually get clean repo now 2022-10-16 20:11:22 -07:00
Sagar Karandikar
a3545f2453 fix base path in generated env.sh 2022-10-16 19:17:14 -07:00
Sagar Karandikar
a646044705 fix open files issue and bump firesim with various fixes 2022-10-16 17:19:12 -07:00
Jerry Zhao
fb2f83b90c Merge pull request #1252 from ucb-bar/fsdb
Default VCS simulators should generate FSDB
2022-10-16 14:15:40 -07:00
Abraham Gonzalez
d6fa88c67d Merge pull request #1254 from MichaelRenMR/main
Docs: Detail run-binary-debug option in Generating Waveforms documentation
2022-10-13 14:26:54 -07:00