Commit Graph

78 Commits

Author SHA1 Message Date
Jerry Zhao
ab21c53a42 Add documentation on HarnessBinders 2020-09-04 23:51:36 -07:00
Zitao Fang
692b120b65 Fixed typo 2020-07-19 21:48:07 -07:00
Zitao Fang
0a39819f44 Add source file note 2020-07-19 21:46:32 -07:00
Zitao Fang
2c7e7f3199 Fixed file links 2020-07-19 21:36:50 -07:00
Zitao Fang
97b8c3035c Merge branch 'dev' of github.com:ucb-bar/chipyard into custom-core-doc 2020-07-15 11:15:46 -07:00
Zitao Fang
9fbc0a5bea Add links 2020-07-15 11:08:36 -07:00
Zitao Fang
7ea464dc90 4th revision 2020-07-14 12:49:36 -07:00
Zitao Fang
14399e88b3 Minor change 2020-07-12 01:23:34 -07:00
Zitao Fang
ced7ea634c 3rd Revision 2020-07-12 01:08:13 -07:00
Zitao Fang
9ad9d00a23 Second revision 2020-07-08 16:02:31 -07:00
Jerry Zhao
661038f992 Deduplicate across Chiypard configs into a ChipyardBaseConfig 2020-07-06 17:54:24 -07:00
Zitao Fang
6cb8a60a80 Remove Key List 2020-07-05 21:18:31 -07:00
Zitao Fang
744e73fa92 Editing Docs 2020-07-05 21:05:21 -07:00
Zitao Fang
104c350a59 Custom Core Integration Doc, 1st Revision 2020-07-02 15:56:15 -07:00
Zitao Fang
7b5f474b04 Finished Custom Core Docs 2020-06-28 21:26:50 -07:00
Zitao Fang
34bc8da002 Add a list of common config keys 2020-06-22 17:57:17 -07:00
Zitao Fang
c407e39cd8 Completed most documentation (without AXI4 bus) 2020-06-20 01:04:56 -07:00
Zitao Fang
c5c272b90d Custom core doc first draft 2020-06-19 13:51:57 -07:00
Abraham Gonzalez
a1717e4032 Merge pull request #568 from ucb-bar/dev-dsptools
Dsptools example cleanup
2020-05-28 15:25:09 -07:00
Paul Rigge
4e696b6a0a Add block diagram, clean up docs more 2020-05-27 11:21:39 -07:00
Paul Rigge
e6984e412b Use Chain for dsptools example.
Rename examples, bump dsptools to master, and incorporate feedback.
2020-05-26 23:00:37 +00:00
Paul Rigge
541d037c5d Remove another duplicate label 2020-05-25 14:33:00 -07:00
abejgonzalez
f24fd2a113 update mem docs | add l1 scratchpad config 2020-05-25 14:29:07 -07:00
Paul Rigge
3d4a6d4ea6 Ugh restructured text sucks 2020-05-25 14:28:32 -07:00
Paul Rigge
1157c6f93d Resolve duplicate label 2020-05-25 14:26:17 -07:00
Paul Rigge
c4d791d323 Update reference to DigitalTop in doc 2020-05-25 14:22:39 -07:00
Paul Rigge
f619b69e33 Update docs/Customization/Dsptools-Blocks.rst
Co-authored-by: alonamid <alonamid@eecs.berkeley.edu>
2020-05-25 14:11:02 -07:00
Paul Rigge
863b3a7bc3 Fix doc references 2020-05-25 14:08:30 -07:00
Paul Rigge
ae1aa31fce Incorporate feedback 2020-05-25 20:23:19 +00:00
Paul Rigge
f56e367d59 Merge remote-tracking branch 'origin/dev' into HEAD 2020-05-23 22:49:51 +00:00
Jerry Zhao
63c46d89c1 Bump sifive-blocks 2020-05-05 13:58:01 -07:00
Abraham Gonzalez
02367022b0 Fix "WithHeterCoresSetup" in hetero. docs (#537) 2020-04-29 16:25:02 -07:00
Ryan Lund
35cba5dfae Dsptools examples (#457)
* Add c test files for DSPTools example

* Update tests Makefile to build DSPTools c tests

* Add DSPTools example configs to ConfigMixins and RocketConfigs

* Add dsptools and rocket-dsptools as dependancies for example

* Add Scala implementations of DSPTools test blocks

* Clean up GenericFIR scala

* Modify dsptools blocks and mixins to match 'CanHave' when adding peripherial

* Update documentation, will need reworking once FIR is characterized as fixed point

* Update naming of Passthrough to Streaming Passthrough. Update naming of Thing to Chain and remove old Chain

* Fix capitalization in docs (#419)

* Add c test files for DSPTools example

* Update tests Makefile to build DSPTools c tests

* Add DSPTools example configs to ConfigMixins and RocketConfigs

* Add dsptools and rocket-dsptools as dependancies for example

* Add Scala implementations of DSPTools test blocks

* Clean up GenericFIR scala

* Modify dsptools blocks and mixins to match 'CanHave' when adding peripherial

* Update documentation, will need reworking once FIR is characterized as fixed point

* Update naming of Passthrough to Streaming Passthrough. Update naming of Thing to Chain and remove old Chain

* Update docs/Customization/Dsptools-Blocks.rst

Co-Authored-By: alonamid <alonamid@eecs.berkeley.edu>

* Docummentation update for clarity and to explain how this can be applied to a generalized block

* Some refactoring to get dsptools working with these examples

* Oops, old files crept in

Co-authored-by: Ryan Lund <ryan.lund@bwrcrdsl-4.eecs.berkeley.edu>
Co-authored-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
Co-authored-by: alonamid <alonamid@eecs.berkeley.edu>
Co-authored-by: Paul Rigge <rigge@berkeley.edu>
2020-04-20 10:33:03 -07:00
John Wright
1f98c84210 Add ChipTop to enable real chip configs with IO cells, etc. (#480)
This adds an additional layer (ChipTop) between the System module and the TestHarness. The IOBinder API is now changed to take only a single parameter (an Any) and return a 3 things: The IO port(s), the IO cell(s), and a function to call inside the test harness, which is analogous to the old IOBinder function, except that it takes a TestHarness object as an argument instead of (clock, reset, success).
* A new Top-level module, ChipTop, has been created. ChipTop instantiates a "system" module specified by BuildSystem.
* BuildTop now builds a ChipTop dut module in the TestHarness by default
* A new BuildSystem key has been added, which by default builds DigitalTop (previously just called Top)
* The IOBinders API has changed. IOBinders are now called inside of ChipTop and return a tuple3 of (IO ports, IO cells, harness functions). The harness functions are now called inside the TestHarness (this is analogous to the previous IOBinder functions).
* IO cell models have been included in ChipTop. These can be replaced with real IO cells for tapeout, or used as-is for simulation.
* The default for the TOP make variable is now ChipTop (was Top)
2020-04-01 14:03:56 -07:00
Howard Mao
2528708c15 add documentation on ring network and system bus 2020-03-19 10:13:03 -07:00
Howard Mao
ffb9c81ce2 fix literalincludes and other path references in documentation 2020-03-16 12:06:59 -07:00
alonamid
d5592ca1a7 bump firesim (#470)
* Fix capitalization in docs (#419)

* Update Quick-Start.rst

* [ci skip] Fix Typos (#444)

* Update Quick-Start.rst

* bump firesim

Co-authored-by: Sagar Karandikar <sagark@eecs.berkeley.edu>
2020-03-13 18:44:47 -07:00
Abraham Gonzalez
01238c8b7a Rename Config Mixins to Fragments (#451)
* [docs] rename config mixins -> fragments [ci skip]

* [docs] cleanup naming | link similar sections [ci skip]

* [boom] bump for mixin rename [ci skip]

* [docs] cleanup capitalization [ci skip]

* [docs] consistent config fragment naming [ci skip]

* [boom] bump boom for documentation changes [ci skip]

* [docs] update source comments [ci skip]

* [docs] fix last config fragment name [ci skip]

Co-Authored-By: alonamid <alonamid@eecs.berkeley.edu>

Co-authored-by: alonamid <alonamid@eecs.berkeley.edu>
2020-02-27 09:31:08 -08:00
Jerry Zhao
708a5fb9a6 Address generator unification PR reviews 2020-02-23 22:53:14 -08:00
Jerry Zhao
c12819eb52 Update docs 2020-02-13 12:33:28 -08:00
Abraham Gonzalez
1859054f73 [docs] update documentation [ci skip] (#393) 2020-01-23 13:36:21 -08:00
Jerry Zhao
ac5235e5ed Revamp the config system for Top/Harness (#347)
* Refactor how Configs parameterize the Top and TestHarnesses

* Bump sha3, testchipip, icenet, firesim
2020-01-21 20:44:54 -08:00
Baltazar Ortiz
d277984eab Update scratchpad config (#371)
* Update scratchpad config

Previous version didn't compile as per
https://github.com/ucb-bar/chipyard/issues/365

* Update docs/Customization/Memory-Hierarchy.rst

Co-Authored-By: Abraham Gonzalez <abe.j.gonza@gmail.com>

* Fix indentation

* Update memory hierarchy doc for PR

Co-authored-by: Abraham Gonzalez <abe.j.gonza@gmail.com>
2020-01-10 12:02:21 -07:00
alonamid
4853300de6 Merge pull request #247 from ucb-bar/firrtl-docs
Firrtl Transforms Documentation
2019-09-27 00:45:44 -07:00
abejgonzalez
f24eba30f6 change order of dontTouch | make more concise [ci skip] 2019-09-27 00:32:47 -07:00
abejgonzalez
802c11dbef add some extra clarity [ci skip] 2019-09-26 23:16:57 -07:00
abejgonzalez
c6bdeda9ed small fixes + cleaner example explanation [ci skip] 2019-09-26 23:10:51 -07:00
Albert Magyar
f2939823ce Clean up paragraph on FIRRTL transform BlackBox support 2019-09-26 10:09:02 -07:00
Albert Magyar
28664ea8df Update section header on Verilog support in chipyard tools 2019-09-26 09:50:41 -07:00
Albert Magyar
216ae3ee54 Add more tips for Verilog blackbox integration 2019-09-26 09:32:38 -07:00