Commit Graph

634 Commits

Author SHA1 Message Date
David Biancolin
580d311059 Use ResetPulseBridge + GlobalResetCondition; bump FireSim 2021-09-11 01:36:02 +00:00
Ella Schwarz
8874801af2 Fix whitespace 2021-06-28 20:42:38 -07:00
Ella Schwarz
4f64a78a84 Bump cva6 2021-06-26 21:24:17 -07:00
Nathan Pemberton
e6bdbbdcc8 Bump the sha3 repo to get software updates for the tutorial 2021-06-11 19:38:10 -04:00
Hasan Genc
da1ca53aa9 Merge remote-tracking branch 'origin/dev' into bump-gemmini 2021-06-10 11:58:47 -07:00
alonamid
4338ef869d Merge pull request #837 from ucb-bar/mar2021-esp-bump
Bump esp-tools (March 2021)
2021-06-10 09:24:54 -07:00
Hasan Genc
334d6a47d6 Bump Gemmini and Spike to resolve Spike reset error 2021-06-10 01:06:38 -07:00
Hasan Genc
b4e3c74086 Bump Gemmini and Esp-isa-sim 2021-06-09 04:25:55 -07:00
alonamid
76b747dc84 Merge pull request #836 from ucb-bar/firesim-default-freqs
Sane FireSim Default Target Freqs
2021-06-08 14:33:57 -07:00
alonamid
014c19768d async to rational crossings 2021-06-07 21:13:10 -07:00
Zitao Fang
798d523c79 Update sha3 repo 2021-06-06 01:03:41 -07:00
Jerry Zhao
23236e8a0f Add default support for I2C and PWM IOs. (#885)
Default generator now supports I2C and PWM periphery blocks.
2021-06-05 16:00:32 -07:00
alonamid
610adfc3f7 address PR review comments 2021-06-03 22:23:17 -07:00
alonamid
c5a0e26e01 revert pbus freq change 2021-06-03 11:41:57 -07:00
alonamid
f2b56072a1 remove crossings in single clock domain 2021-06-02 21:26:29 -07:00
alonamid
abd7bfa607 safe pbus freq to match sbus 2021-06-02 21:25:02 -07:00
alonamid
06b8cf84f9 update default firesim config freqs 2021-06-02 20:00:02 -07:00
alonamid
225cf9d29a update frequency config fragements 2021-06-01 16:40:31 -07:00
Abraham Gonzalez
45f63a1409 Merge pull request #879 from ucb-bar/remove-gen-sim-files
Remove GenerateSimFiles and use make instead
2021-05-13 16:41:17 -05:00
David Biancolin
15a30a73e9 [firechip] Memomize Clock RecordMap creation to fix supernode 2021-05-07 06:39:45 +00:00
abejgonzalez
1d52899736 Remove GenerateSimFiles and use make instead 2021-05-06 00:27:11 -07:00
Tim Snyder
cdca36a935 bump testchipip 2021-05-05 03:25:39 +00:00
abejgonzalez
65154b7910 Merge branch 'master' of ssh://github.com/milovanovic/chipyard into dev 2021-05-03 14:10:52 -07:00
Jiuyang Liu
4901e2d257 remove toBool to asBool. 2021-04-20 02:54:29 +00:00
Vladimir Milovanović
c046af0de2 Bump tests for scalatest version change. 2021-04-18 17:43:10 +02:00
Jerry Zhao
fd0ba3f315 Synchronize JTAG reset to JTAG.TCK. 2021-04-17 01:27:07 -07:00
Jerry Zhao
3a52b709db Bump testchipip 2021-04-01 18:20:41 -07:00
Jerry Zhao
709c6bb365 Bump testchipip 2021-03-31 09:19:29 -07:00
Jerry Zhao
c061ea0ac9 Bump testchipip | Add custom boot pin 2021-03-30 01:45:34 -07:00
alonamid
b99d6bb7ac multiclock config multiple 2021-03-29 00:01:13 -07:00
alonamid
c93cd255ab sane firesim default target freqs 2021-03-25 23:28:07 -07:00
Jerry Zhao
ed2bfa8249 Don't pass JTAG oe signal off-chip (#832) 2021-03-24 01:08:46 -07:00
abejgonzalez
09ef82cabf Update harnessClk/Rst naming to buildtop | Small docs cleanup 2021-03-22 13:11:12 -07:00
abejgonzalez
5ffad327db Bump testchipip 2021-03-21 15:34:01 -07:00
abejgonzalez
55263971bc Use async queue to connect serdesser + other components 2021-03-19 20:49:49 -07:00
abejgonzalez
f59a7901b0 Bump testchipip 2021-03-19 18:43:17 -07:00
abejgonzalez
87fa481cbb Fix TileResetCtrl so that tiles come out of reset after rest of uncore 2021-03-19 17:35:30 -07:00
abejgonzalez
1e42113926 Splitting up FireSim default frequencies into a separate config frag. 2021-03-19 17:33:39 -07:00
abejgonzalez
4a565088b5 Small spacing fixes 2021-03-18 20:01:45 -07:00
abejgonzalez
7b7bcf7996 Merge remote-tracking branch 'origin/dev' into offchip-axi-setup 2021-03-18 17:56:57 -07:00
abejgonzalez
5301723404 Use def instead of var Option for ref frequency 2021-03-16 19:42:24 -07:00
abejgonzalez
6476c7e7f0 Small renaming/cleanup | Use LinkedHashMaps 2021-03-15 16:54:42 -07:00
Jerry Zhao
c5e7d8a9b2 Give HarnessRAM implicit clock/reset in SerialTiedOff 2021-03-15 15:35:41 -07:00
Jerry Zhao
a013f0d561 Fix SerialTL HarnessRAM BridgeBinder 2021-03-15 15:09:29 -07:00
Jerry Zhao
edd54e776c Bump testchipip 2021-03-15 14:05:33 -07:00
Jerry Zhao
8a78565c04 Update BridgeBinders with new HarnessRAM clocking 2021-03-15 12:45:40 -07:00
Jerry Zhao
c27c9d5d18 Add option to add async queues between chip-serialIO and harness serdes 2021-03-15 02:16:18 -07:00
Jerry Zhao
f52822ff7a Merge pull request #826 from ucb-bar/tile-reset-async
Fix TileResetCtrl to be ahead of reset synchronizers.
2021-03-12 16:51:58 -08:00
Jerry Zhao
2260fffc9c Bump testchipip 2021-03-12 09:33:50 -08:00
Jerry Zhao
c5cb8f1329 Bump testchipip for TileResetCtrl changes 2021-03-11 18:23:36 -08:00