Richard Yan
e08bf2c2c9
fix sbus location
2024-04-20 03:07:26 -07:00
Richard Yan
3e0d87e1dd
Merge branch 'main' of https://github.com/ucb-bar/radiance into main
2024-04-17 18:09:52 -07:00
Richard Yan
bb8575252e
changes for synthesis
2024-04-17 18:09:48 -07:00
Richard Yan
ad504a5607
better xbar naming in smem system
2024-04-17 18:09:30 -07:00
Hansung Kim
3b9f538aa2
Fix elaboration error when both including dup-nondup RF
2024-04-15 22:20:02 -07:00
Hansung Kim
378d298a06
Bump vortex for RF dup
2024-04-15 21:49:14 -07:00
Hansung Kim
1aa2d93600
Enable rs1/2/3 duplicated GPR by default
2024-04-15 21:46:43 -07:00
Richard Yan
824cae7c50
Merge branch 'main' of https://github.com/ucb-bar/radiance into main
2024-04-15 09:43:43 -07:00
Richard Yan
cbcbdb1865
get rid of monitors
2024-04-15 09:43:39 -07:00
Hansung Kim
83ac1788c9
Enable FPU_FPNEW
2024-04-13 17:12:17 -07:00
Hansung Kim
c8ce2cbe11
Add addResource for fpNew
2024-04-13 17:12:17 -07:00
Hansung Kim
2368988ce7
Remove unused addResource
2024-04-13 17:12:17 -07:00
Hansung Kim
21d2d860ca
Report cease true from GemminiTile
2024-04-13 17:12:17 -07:00
Richard Yan
b6597660a2
bug fix
2024-04-10 14:15:36 -07:00
Richard Yan
edf758de70
Merge branch 'main' of https://github.com/ucb-bar/radiance into main
2024-04-09 20:09:07 -07:00
Richard Yan
c2fbe8388e
route aligned smem requests separately, fix node bugs
2024-04-09 20:07:58 -07:00
Hansung Kim
675624e9c8
Remove obsolete assertion on cluster SRAM
2024-04-08 18:24:38 -07:00
Hansung Kim
47c7eacafd
SourceGen: Handle gen and claim at the same cycle
...
This is possible for 0-latency response on the D channel.
2024-04-08 18:23:39 -07:00
Hansung Kim
48c3a5692e
Remove radpie from EXTRA_SIM_REQS
...
Cargo causes VCS rebuild without RTL change which makes param sweep runs
annoying.
2024-04-01 12:09:20 -07:00
Hansung Kim
9e877b0efc
Set numBarriers == numWarps
...
still requires manually updating radiance.mk
2024-04-01 12:09:20 -07:00
Hansung Kim
2a3a9c844f
Bump vortex
2024-04-01 12:09:20 -07:00
Richard Yan
f60a318edb
word strided subbanks, parallel subbank access for gemmini and all-to-all xbar parallel access for radiance smem
2024-04-01 10:54:17 -07:00
Richard Yan
9fb861a873
make unified memory node modular
2024-03-26 23:13:30 -07:00
Richard Yan
cb0a4c526e
Merge branch 'main' of https://github.com/ucb-bar/radiance into main
2024-03-26 17:20:38 -07:00
Richard Yan
058e1ca3e6
gemmini tile and configs
2024-03-26 17:02:53 -07:00
Richard Yan
45c2cf415a
move gemmini connections and smem from tile to cluster
2024-03-26 17:02:32 -07:00
Richard Yan
eaef07385c
cleanup vortex sources
2024-03-26 17:00:39 -07:00
Hansung Kim
215ac369cb
Do proper barrier param negotiation for numCores
2024-03-23 13:48:44 -07:00
Hansung Kim
54b64aba07
Use ssh for vortex remote path
2024-03-22 19:47:26 -07:00
Hansung Kim
c28f0510d8
Change vortex submodule remote
2024-03-22 09:53:18 -07:00
Hansung Kim
20a33e5a40
Bump vortex
2024-03-21 15:45:56 -07:00
Hansung Kim
16fdc65e53
Add cluster-specific Verilog preproc flags to radiance.mk
2024-03-21 13:23:10 -07:00
Hansung Kim
7258d69ce8
Parameterize barrier params better
...
Some numbers still hardcoded at client side, need to do proper diplomacy
negotiation
2024-03-21 13:22:07 -07:00
Hansung Kim
0e9cb884a8
Remove software-based barrier MMIO
2024-03-21 13:22:07 -07:00
Hansung Kim
688755ef82
Add debug delay to BarrierSynchronizer
2024-03-21 13:22:07 -07:00
Richard Yan
6d5418fd87
Merge branch 'main' of https://github.com/ucb-bar/radiance into main
2024-03-20 16:42:54 -07:00
Richard Yan
3510b3d44f
update gemmini config
2024-03-20 16:13:27 -07:00
Hansung Kim
785dcc9df7
Bump vortex
2024-03-18 14:32:06 -07:00
Hansung Kim
0a4151e3cb
Add BarrierSynchronizer module
2024-03-18 14:10:38 -07:00
Hansung Kim
9024048a52
Bump vortex
2024-03-17 14:13:33 -07:00
Hansung Kim
b5074f5517
Connect core gbar signals to cluster via Diplomacy
2024-03-17 14:12:10 -07:00
Hansung Kim
92069099a2
Bump vortex with LSU fix
2024-03-14 16:47:39 -07:00
Hansung Kim
afc209a28b
Create MMIO regs for software-implemented cluster-wide barrier
2024-03-14 16:46:41 -07:00
Hansung Kim
49dfb5b97a
Reformat perfcounter report
2024-03-14 16:45:11 -07:00
Hansung Kim
eca3619380
Bump vortex
2024-03-07 17:44:21 -08:00
Hansung Kim
8680c64e5b
Force numBanks = 1 for icache
...
Given that the number of imem port is 1 and imem access has good spatial
locality, force single bank config for icache.
2024-03-07 17:18:59 -08:00
Hansung Kim
396fddf437
Add latency perf counter to imem
2024-03-07 17:18:40 -08:00
Hansung Kim
469c0fe962
Parameterize cache size in VortexL1Cache
2024-03-07 17:18:02 -08:00
Hansung Kim
759b96bcef
Define ICACHE_DISABLE/DCACHE_DISABLE to keep with upstream merge
...
Upstream got a change that defines L1_ENABLE when {I,D}CACHE_ENABLE is
defined, which they are by default. It also define-gates some of the
ibuffer code with L1_ENABLE which breaks the sim. Explicitly defining
these flags prevent this from happening.
2024-03-07 16:01:42 -08:00
Hansung Kim
c2d4adb70c
Define PERF_ENABLE
2024-03-07 16:01:03 -08:00
