Commit Graph

806 Commits

Author SHA1 Message Date
Abraham Gonzalez
c788fdce19 Fix Verilog Prerequisites + Ignore mv stdout (#1406)
* Fix Ibex vlog compilation deps | Ignore mv stderr

* Init DRAMSim2

* Use size_t in cospike.cc

* Use size_t in spiketile.cc
2023-03-17 15:50:54 -07:00
Jerry Zhao
ae730db67e Merge pull request #1386 from ucb-bar/xcelium-support
xcelium support
2023-03-16 15:02:48 -07:00
abejgonzalez
f4124e4cb6 Add Lean Gemmini FireChip target 2023-03-11 22:31:36 -08:00
Jerry Zhao
8d433f6536 Bump gemmini/sha3 to fix baremetal test compile 2023-03-11 10:33:53 -08:00
abejgonzalez
a62c1f5010 Add a frag./config for MMIO only bridges 2023-03-09 20:09:46 -08:00
Sagar Karandikar
88d7ababe8 Merge remote-tracking branch 'origin/main' into xcelium-support 2023-03-09 01:49:45 +00:00
Sagar Karandikar
7c2ec8fb4c more fixes 2023-03-09 01:48:25 +00:00
Sagar Karandikar
8947216707 first pass at xcelium support 2023-03-08 17:57:31 +00:00
Jerry Zhao
4f74f29724 Merge pull request #1345 from ucb-bar/bringup2
Arty100T board + TSI-over-UART
2023-03-07 18:21:45 -08:00
abejgonzalez
1357ea4f12 Update assert message 2023-03-01 13:39:00 -08:00
Jerry Zhao
66e4448008 Merge remote-tracking branch 'origin/main' into bringup2 2023-02-28 16:19:14 -08:00
Jerry Zhao
2a4c5e6f88 Bump testchipip 2023-02-28 16:16:04 -08:00
Jerry Zhao
be27029707 Merge pull request #1358 from ucb-bar/detcip
Remove TLHelper, directly use tilelink node constructors
2023-02-28 15:17:10 -08:00
Jerry Zhao
4cdc2801be Override spike's misa in cosim mode
Writable bits in MISA is implementation-defined, so we can't follow spike here.
2023-02-22 15:15:28 -08:00
Jerry Zhao
f8fb8f38d8 Bump testchipip 2023-02-22 14:49:43 -08:00
Jerry Zhao
27b0dd8abe Remove TLHelper, directly use tilelink node constructors
TLHelper 1) obfuscates the underlying node architecture and
2) results in otherwise unnecessary dependencies on testchipip
2023-02-22 11:35:38 -08:00
Jerry Zhao
154c31677c Consolidate mmio-accelerator test configs into a single config 2023-02-22 00:21:44 -08:00
Jerry Zhao
a4827b0749 Consolidate peripheral device testing configs into a single ManyPeripheralsConfig 2023-02-22 00:21:44 -08:00
Jerry Zhao
dd52a3ba8f Bump boom 2023-02-22 00:21:44 -08:00
Abraham Gonzalez
632a7a9348 Merge pull request #1349 from ucb-bar/misc-improv
Small build system improvements
2023-02-16 11:40:55 -08:00
Jerry Zhao
a50e7d3117 Add more arty100t configs with configurable TSI-UART baudrate 2023-02-15 21:45:09 -08:00
abejgonzalez
aa02295a0b Fix spacing of AbstactConfig 2023-02-15 19:24:43 -08:00
Jerry Zhao
089dbc1fb6 Merge pull request #1323 from ucb-bar/spikecosim
Add support for cosimulation with Spike
2023-02-15 15:29:47 -08:00
abejgonzalez
85fe061244 Use EICG_wrapper model as addResource/Path | Fix Makefile parsing 2023-02-15 14:19:55 -08:00
Jerry Zhao
971bd9bec7 Bump testchipip 2023-02-15 14:03:41 -08:00
Jerry Zhao
89090f6b90 Remove need for separate SpikeCosimResources 2023-02-15 10:17:08 -08:00
Jerry Zhao
61cc18749a Fix more bugs with arty100t 2023-02-14 17:15:44 -08:00
Jerry Zhao
85fa9d1120 Add ARTY100t bringup + TSI-over-UART 2023-02-14 15:01:52 -08:00
Jerry Zhao
3dc4fff29b Merge pull request #1339 from ucb-bar/bump-constellation
Bump constellation for some bug fixes
2023-02-14 13:55:53 -08:00
Jerry Zhao
efe5122cc3 Merge pull request #1340 from ucb-bar/accelcfg
Split up RocketConfigs.scala
2023-02-14 10:01:28 -08:00
Jerry Zhao
2096ffa7af Bump rocket-chip 2023-02-14 00:35:30 -08:00
Jerry Zhao
74f4c8c1d7 Add a NoCore config - useful for testing 2023-02-13 18:46:20 -08:00
Jerry Zhao
9e7cdb6ccd Remove Ringbus config from firechip 2023-02-11 15:48:16 -08:00
Jerry Zhao
1ee45b55da Add new PeripheralDeviceConfigs 2023-02-11 12:58:43 -08:00
Jerry Zhao
4751d72d2f Remove old RingSystemBusConfig 2023-02-11 12:55:11 -08:00
Jerry Zhao
7a8bbd0747 split RocketConfigs into RoCCAccelConfigs and MMIOAccelConfigs 2023-02-11 12:44:42 -08:00
Jerry Zhao
6e5ac8c467 Bump constellation for some bug fixes 2023-02-11 12:32:17 -08:00
Jerry Zhao
1766501795 Fix Spike DPI decoupled interface 2023-02-11 12:29:45 -08:00
Jerry Zhao
670569f611 Merge remote-tracking branch 'origin/main' into spikecosim 2023-02-11 12:21:58 -08:00
Jerry Zhao
f2dfd295e2 Merge pull request #1338 from ucb-bar/sodor
Bump sodor for SLLI/SRLI/SRAI fix
2023-02-11 00:22:47 -08:00
Albert Ou
445895eb84 Bump sodor for SLLI/SRLI/SRAI fix 2023-02-10 16:11:04 -08:00
Jerry Zhao
06b16e865e Move boom's tracegen interface to boom submodule - this improves maintainability 2023-02-08 09:35:13 -08:00
Jerry Zhao
d5bf00aab1 Bump spike-cosim for spike changes 2023-02-07 14:04:55 -08:00
Jerry Zhao
e1eed42ed8 Merge remote-tracking branch 'origin/main' into spikecosim 2023-02-07 11:55:23 -08:00
Jerry Zhao
48905323d1 Fix spiketile not compiling: 2023-02-05 23:11:16 -08:00
Jerry Zhao
16353f9091 Merge remote-tracking branch 'origin/main' into de-esp-tools 2023-02-05 22:44:05 -08:00
Jerry Zhao
2a2de5850f Implement cosim purely in a HarnessBindeR 2023-02-05 20:59:14 -08:00
Jerry Zhao
a6921d15c6 Merge pull request #1325 from ucb-bar/ring_example 2023-02-05 16:42:41 -08:00
Jerry Zhao
e5a734e20a Bump gemmini 2023-02-05 09:59:58 -08:00
Jerry Zhao
fc611ef507 Fix CSR overrides in spike cosim 2023-02-04 16:55:43 -08:00