Jerry Zhao
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e50adecd31
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Bump rerocc
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2024-05-29 17:48:14 -07:00 |
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Jerry Zhao
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4f1dd4e195
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Add rerocc to tests
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2024-05-29 17:43:31 -07:00 |
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Jerry Zhao
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13dda46764
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Integrate rerocc
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2024-05-29 16:18:39 -07:00 |
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Jerry Zhao
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fdb4726770
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Add rerocc to build.sbt
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2024-05-29 16:18:38 -07:00 |
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Jerry Zhao
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e8eeaad36d
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Add rerocc to check-commit CI
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2024-05-29 16:18:38 -07:00 |
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Jerry Zhao
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385c055ef7
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Add rerocc submodule
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2024-05-29 16:17:48 -07:00 |
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Jerry Zhao
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b355a52ff0
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Merge pull request #1884 from ucb-bar/gcd_io
Add GCD IOBinders examples
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2024-05-29 14:55:17 -07:00 |
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Jerry Zhao
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d523df516b
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Merge pull request #1461 from ucb-bar/single-clock
Add singleclock broadcast clockbinder
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2024-05-28 14:41:30 -07:00 |
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Jerry Zhao
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17f784bfd3
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Add example clocking configs and SingleClockBroadcast option
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2024-05-28 12:26:22 -07:00 |
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Jerry Zhao
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9a5673ddef
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Add singleclock broadcast clockbinder
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2024-05-28 11:19:40 -07:00 |
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Hansung Kim
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8c6c1d870d
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Revert riscv-isa-sim and riscv-pk
socketlib fails to build as of now
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2024-05-23 16:21:12 -07:00 |
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Hansung Kim
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1d20177be1
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Bump radiance
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2024-05-23 16:11:11 -07:00 |
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Jerry Zhao
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3c31faef7b
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Add GCD IOBinders examples
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2024-05-23 12:50:20 -07:00 |
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bartender
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16bc0531e9
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[cd] Bump CIRCT from firtool-1.66.0 to firtool-1.75.0
This is an automated commit generated by the `circt/update-circt` GitHub
Action.
(cherry picked from commit 0a4a055f375bec7620ab38e2704261d73385cfd7)
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2024-05-21 06:56:47 +00:00 |
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Nayiri
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3a6677bc30
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Fix clock name and macro paths for Sky130 VLSI flow (#1882)
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2024-05-19 17:54:47 -07:00 |
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Jerry Zhao
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ef71dfd40a
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Merge pull request #1881 from ucb-bar/bump-rc-vec
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2024-05-18 00:16:45 -07:00 |
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Jerry Zhao
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5c57d8733b
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Bump shuttle/boom
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2024-05-17 16:31:47 -07:00 |
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Jerry Zhao
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2f2cde8748
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Bump rocket-chip
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2024-05-17 12:13:44 -07:00 |
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Hansung Kim
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1e5b468e79
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vcs.mk: Ignore null statement lint
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2024-05-16 15:50:29 -07:00 |
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Jerry Zhao
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309cbe9792
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Merge pull request #1880 from ucb-bar/classpath_fixes
Fix classpath_cache bug
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2024-05-16 15:12:07 -07:00 |
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Jerry Zhao
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3cf3d815dc
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Rename fpga_platforms to chipyard_fpga
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2024-05-16 09:53:48 -07:00 |
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Jerry Zhao
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0c3ede15af
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Rename CHIPYARD_CLASSPATH to GENERATOR_CLASSPATH
This name better reflects that this classpath must contain a Generator main,
but does not have to necessarily be the chipyard project in build.sbt
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2024-05-16 09:51:40 -07:00 |
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Jerry Zhao
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9737d62635
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Add comments on what CHIPYARD_CLASSPATH and TAPEOUT_CLASSPATH contain
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2024-05-16 09:50:36 -07:00 |
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Jerry Zhao
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c60d0475b6
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remove redundant CLASSPATH_TARGETS (this is always the same as CLASSPATH)
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2024-05-16 09:46:06 -07:00 |
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joonho hwangbo
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afff9c4243
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Misc configs | rocketchip bump (#1877)
* Misc configs | rocketchip bump
* Add NoTraceIOBridge
* Nit
* Remove useless configs
* FireSim NoC config
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2024-05-15 23:56:06 -07:00 |
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Richard Yan
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30bdd1efcd
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bump radiance
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2024-05-15 23:42:37 -07:00 |
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Richard Yan
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a18c5de271
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Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-bar-main
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2024-05-15 23:22:20 -07:00 |
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Richard Yan
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eab9eabf98
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support for .out printf
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2024-05-15 21:52:04 -07:00 |
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Richard Yan
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594f0f76ee
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new shared memory config
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2024-05-15 21:49:18 -07:00 |
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Jerry Zhao
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e2f4ea6814
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Merge pull request #1854 from ucb-bar/chisel6-attempt2
Support Chisel6 for RTL-sim/VLSI/FPGA flows
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2024-05-13 15:10:43 -07:00 |
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Jerry Zhao
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3cda03a96a
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Combine chipyard-full-flow into one job
These were serialized anyways. Breaking them into separate jobs caused
transient failures.
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2024-05-13 12:48:06 -07:00 |
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Jerry Zhao
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743681b6aa
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Dedup apache dependencies in build.sbt
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2024-05-13 12:48:06 -07:00 |
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Jerry Zhao
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ab78bbe329
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Precisely define firesim source directories
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2024-05-13 12:48:06 -07:00 |
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Jerry Zhao
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39092e9b00
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Switch RTL-sim/FPGA/VLSI flows to chisel6
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2024-05-13 12:48:06 -07:00 |
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Jerry Zhao
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daf4b64f52
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Update fpga-flow to remove chisel6-incompatible APIs
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2024-05-13 12:48:05 -07:00 |
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Jerry Zhao
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295435a80d
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Bump fpga-shells to fix chisel6-breaking API
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2024-05-13 12:48:05 -07:00 |
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Jerry Zhao
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ab077ef494
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Add stage/stage-chisel3 to makefile source-finder
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2024-05-13 12:48:05 -07:00 |
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Jerry Zhao
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2be92bc49d
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Update chisel6 chipyard-stage API
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2024-05-13 12:48:05 -07:00 |
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Jerry Zhao
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4b28789f78
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Add chisel6 stage
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2024-05-13 12:48:05 -07:00 |
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Jerry Zhao
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c2d4180423
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Move chipyard stage to separate directory
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2024-05-13 12:48:04 -07:00 |
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Jerry Zhao
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0d51cc331d
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Bump chisel6-dsptools
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2024-05-13 12:48:04 -07:00 |
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Jerry Zhao
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718f197611
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Add standalone midas-targetutils
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2024-05-13 12:48:04 -07:00 |
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Jerry Zhao
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b37e550ace
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Add chisel6 fixedpoint/dsptools
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2024-05-13 12:48:04 -07:00 |
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Jerry Zhao
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58dc407b6c
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Rename dsptools/fixedpoint submods to chisel3
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2024-05-13 12:47:59 -07:00 |
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Jerry Zhao
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83c56ecad6
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Bump mempress to modern chisel
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2024-05-13 12:47:11 -07:00 |
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Jerry Zhao
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c8c176b215
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Remove sha3 due to no chisel6 compatibility
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2024-05-10 17:27:11 -07:00 |
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Jerry Zhao
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838cd9a69f
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Remove hwacha/esp-tools
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2024-05-10 17:27:10 -07:00 |
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Jerry Zhao
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5870c6e4d4
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Merge pull request #1866 from ucb-bar/detach_sbt
Detach build.sbt from firesim's build.sbt
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2024-05-10 17:24:56 -07:00 |
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Jerry Zhao
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6f328ce01a
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Merge pull request #1871 from ucb-bar/bump-sd
bump spike devices
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2024-05-10 17:24:33 -07:00 |
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Richard Yan
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b1beb324f1
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Merge branch 'graphics' of https://github.com/hansungk/chipyard into graphics
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2024-05-08 15:06:01 -07:00 |
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