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Author SHA1 Message Date
Brandon Whitchurch
ecd7c805a4 remove debug print 2024-06-13 09:18:44 -07:00
Brandon Whitchurch
e4e49ef898 use DFS to recursively search and expand includes in a single pass 2024-06-13 09:13:05 -07:00
Brandon Whitchurch
feeab6b93b add check for duplicate include directives 2024-06-13 08:35:37 -07:00
Brandon Whitchurch
316c41ea52 fixes for insert includes 
- avoid infinite loop condition
    - follow pep8 style guide
    - encapsulate some functionality to decrease visual nesting
 2024-06-13 08:19:27 -07:00
Jerry Zhao
eca3888f24 Merge pull request #1899 from ucb-bar/firrtl-log 
Generate a log file of the CIRCT output
 2024-06-12 14:54:29 -07:00
Jerry Zhao
44a77b55f7 Merge pull request #1883 from ucb-bar/mergify/copy/main/pr-1878 
[cd] Bump CIRCT from firtool-1.66.0 to firtool-1.75.0 (copy #1878)
 2024-06-12 13:46:31 -07:00
Jerry Zhao
eee405331b Bump CIRCT submodule 2024-06-12 13:46:00 -07:00
Jerry Zhao
dcb3d24b08 Log CIRCT output into a log file 2024-06-12 11:37:13 -07:00
Jerry Zhao
a15fb7ff3d Remove unused thin-client stuff 2024-06-12 11:36:55 -07:00
Jerry Zhao
4fdc224c48 Fix uniquify script for new firtool 2024-06-12 11:11:27 -07:00
Jerry Zhao
78737b9ab9 Merge pull request #1898 from bwhitchurch/fix-python-version 
add upper bound for python version to avoid incompatible packages
 2024-06-11 20:30:26 -07:00
Brandon Michael Whitchurch
e1f37c0d3f add upper bound for python version to avoid incompatible packages 2024-06-11 11:32:56 -07:00
Jerry Zhao
a6c0d1a728 Merge pull request #1897 from ucb-bar/jerryz123-patch-1 
Remove firesim build.sbt from our SBT dependencies
 2024-06-07 10:39:21 -07:00
Jerry Zhao
28b157c216 Remove firesim build.sbt from our SBT dependencies 
We don't depend on firesim's build.sbt anymore
 2024-06-06 17:41:44 -07:00
Jerry Zhao
eb6910aae0 Merge pull request #1891 from ucb-bar/name_domains 
Name all the generated ClockDomains
 2024-05-30 16:05:16 -07:00
Jerry Zhao
2d2abed586 Name all the generated ClockDomains 2024-05-30 14:45:24 -07:00
Jerry Zhao
77972c8715 Merge pull request #1783 from ucb-bar/rerocc-integrate 
Integrate ReRoCC
 2024-05-30 14:43:06 -07:00
Jerry Zhao
e50adecd31 Bump rerocc 2024-05-29 17:48:14 -07:00
Jerry Zhao
4f1dd4e195 Add rerocc to tests 2024-05-29 17:43:31 -07:00
Jerry Zhao
13dda46764 Integrate rerocc 2024-05-29 16:18:39 -07:00
Jerry Zhao
fdb4726770 Add rerocc to build.sbt 2024-05-29 16:18:38 -07:00
Jerry Zhao
e8eeaad36d Add rerocc to check-commit CI 2024-05-29 16:18:38 -07:00
Jerry Zhao
385c055ef7 Add rerocc submodule 2024-05-29 16:17:48 -07:00
Jerry Zhao
b355a52ff0 Merge pull request #1884 from ucb-bar/gcd_io 
Add GCD IOBinders examples
 2024-05-29 14:55:17 -07:00
Jerry Zhao
d523df516b Merge pull request #1461 from ucb-bar/single-clock 
Add singleclock broadcast clockbinder
 2024-05-28 14:41:30 -07:00
Jerry Zhao
17f784bfd3 Add example clocking configs and SingleClockBroadcast option 2024-05-28 12:26:22 -07:00
Jerry Zhao
9a5673ddef Add singleclock broadcast clockbinder 2024-05-28 11:19:40 -07:00
Jerry Zhao
3c31faef7b Add GCD IOBinders examples 2024-05-23 12:50:20 -07:00
bartender
16bc0531e9 [cd] Bump CIRCT from firtool-1.66.0 to firtool-1.75.0 
This is an automated commit generated by the `circt/update-circt` GitHub
Action.

(cherry picked from commit 0a4a055f375bec7620ab38e2704261d73385cfd7)
 2024-05-21 06:56:47 +00:00
Nayiri
3a6677bc30 Fix clock name and macro paths for Sky130 VLSI flow (#1882) 2024-05-19 17:54:47 -07:00
Jerry Zhao
ef71dfd40a Merge pull request #1881 from ucb-bar/bump-rc-vec 2024-05-18 00:16:45 -07:00
Jerry Zhao
5c57d8733b Bump shuttle/boom 2024-05-17 16:31:47 -07:00
Jerry Zhao
2f2cde8748 Bump rocket-chip 2024-05-17 12:13:44 -07:00
Jerry Zhao
309cbe9792 Merge pull request #1880 from ucb-bar/classpath_fixes 
Fix classpath_cache bug
 2024-05-16 15:12:07 -07:00
Jerry Zhao
3cf3d815dc Rename fpga_platforms to chipyard_fpga 2024-05-16 09:53:48 -07:00
Jerry Zhao
0c3ede15af Rename CHIPYARD_CLASSPATH to GENERATOR_CLASSPATH 
This name better reflects that this classpath must contain a Generator main,
but does not have to necessarily be the chipyard project in build.sbt
 2024-05-16 09:51:40 -07:00
Jerry Zhao
9737d62635 Add comments on what CHIPYARD_CLASSPATH and TAPEOUT_CLASSPATH contain 2024-05-16 09:50:36 -07:00
Jerry Zhao
c60d0475b6 remove redundant CLASSPATH_TARGETS (this is always the same as CLASSPATH) 2024-05-16 09:46:06 -07:00
joonho hwangbo
afff9c4243 Misc configs | rocketchip bump (#1877) 
* Misc configs | rocketchip bump

* Add NoTraceIOBridge

* Nit

* Remove useless configs

* FireSim NoC config
 2024-05-15 23:56:06 -07:00
Jerry Zhao
e2f4ea6814 Merge pull request #1854 from ucb-bar/chisel6-attempt2 
Support Chisel6 for RTL-sim/VLSI/FPGA flows
 2024-05-13 15:10:43 -07:00
Jerry Zhao
3cda03a96a Combine chipyard-full-flow into one job 
These were serialized anyways. Breaking them into separate jobs caused
transient failures.
 2024-05-13 12:48:06 -07:00
Jerry Zhao
743681b6aa Dedup apache dependencies in build.sbt 2024-05-13 12:48:06 -07:00
Jerry Zhao
ab78bbe329 Precisely define firesim source directories 2024-05-13 12:48:06 -07:00
Jerry Zhao
39092e9b00 Switch RTL-sim/FPGA/VLSI flows to chisel6 2024-05-13 12:48:06 -07:00
Jerry Zhao
daf4b64f52 Update fpga-flow to remove chisel6-incompatible APIs 2024-05-13 12:48:05 -07:00
Jerry Zhao
295435a80d Bump fpga-shells to fix chisel6-breaking API 2024-05-13 12:48:05 -07:00
Jerry Zhao
ab077ef494 Add stage/stage-chisel3 to makefile source-finder 2024-05-13 12:48:05 -07:00
Jerry Zhao
2be92bc49d Update chisel6 chipyard-stage API 2024-05-13 12:48:05 -07:00
Jerry Zhao
4b28789f78 Add chisel6 stage 2024-05-13 12:48:05 -07:00
Jerry Zhao
c2d4180423 Move chipyard stage to separate directory 2024-05-13 12:48:04 -07:00