nayiri-k
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78b6bdb754
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Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into openroad
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2023-03-13 11:27:47 -07:00 |
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nayiri-k
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f2cf6b7e18
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updating prerequisite setup for sky130 tutorials [skip ci]
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2023-03-13 11:27:38 -07:00 |
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Nayiri Krzysztofowicz
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3b1530402f
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Merge branch 'vlsi-tutorial' of https://github.com/ucb-bar/chipyard into openroad
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2023-03-12 12:29:07 -07:00 |
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Nayiri Krzysztofowicz
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1fd5381f89
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Merge branch 'main' of https://github.com/ucb-bar/chipyard into vlsi-tutorial
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2023-03-12 10:42:20 -07:00 |
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joey0320
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3b79de660f
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fix
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2023-03-11 20:02:53 -08:00 |
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joey0320
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d7574084c1
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Update docs related to circt
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2023-03-11 18:56:36 -08:00 |
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joey0320
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1c1b0effa3
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update docs for release
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2023-03-11 16:52:50 -08:00 |
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nayiri-k
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e8c1b09d70
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added note about generated-src being different for commercial/openroad flows
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2023-03-10 22:37:31 -08:00 |
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nayiri-k
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d2130f2e31
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updated layout of openroad design [skip ci]
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2023-03-10 20:47:24 -08:00 |
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nayiri-k
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89a23faa00
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updating docs to include correct build path [skip ci]
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2023-03-10 15:12:43 -08:00 |
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nayiri-k
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15d001fe0c
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updated skywater tutorials
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2023-03-09 11:35:41 -08:00 |
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Ella Schwarz
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c7ea3b6a47
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Minor clarification in visualization section
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2023-03-08 13:01:42 -08:00 |
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Ella Schwarz
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f1c24383b9
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Add graphml visualization section
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2023-03-08 10:14:57 -08:00 |
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Jerry Zhao
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4f74f29724
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Merge pull request #1345 from ucb-bar/bringup2
Arty100T board + TSI-over-UART
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2023-03-07 18:21:45 -08:00 |
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Jerry Zhao
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f8fb63687c
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Add arty100T and uart-tsi instructions
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2023-03-06 17:48:26 -08:00 |
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Abraham Gonzalez
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f7a39f80e7
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Config finder make target (#1328)
* Add config-finder make target
* Add recursive functionality
* Add config finder to CI
* Workaround bash argument limit failures
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2023-03-06 14:00:20 -08:00 |
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abejgonzalez
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e744f7a20b
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Remove chisel-testers submodule
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2023-03-03 16:50:05 -08:00 |
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Harrison Liew
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79a7275ad5
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pattern match VLSI upgrade script
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2023-03-01 14:02:35 -08:00 |
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Jerry Zhao
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be27029707
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Merge pull request #1358 from ucb-bar/detcip
Remove TLHelper, directly use tilelink node constructors
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2023-02-28 15:17:10 -08:00 |
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Harrison Liew
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a146bad526
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fix typos
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2023-02-24 15:59:33 -08:00 |
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Harrison Liew
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eb155a604f
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move hier docs
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2023-02-24 15:05:35 -08:00 |
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Harrison Liew
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7566eae213
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fix & clarify hierarchical flows
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2023-02-24 14:56:28 -08:00 |
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Jerry Zhao
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27b0dd8abe
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Remove TLHelper, directly use tilelink node constructors
TLHelper 1) obfuscates the underlying node architecture and
2) results in otherwise unnecessary dependencies on testchipip
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2023-02-22 11:35:38 -08:00 |
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Harrison Liew
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660c63fb34
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Merge pull request #1324 from ucb-bar/new-hammer
New Hammer
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2023-02-15 13:14:01 -08:00 |
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ken_ho
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4977d8fb49
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Upgrade-vlsi script
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2023-02-13 15:49:41 -08:00 |
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Jerry Zhao
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b92928090d
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Update doc source references
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2023-02-11 13:00:57 -08:00 |
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Jerry Zhao
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f321d7bd3b
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Remove references to old ringsbus
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2023-02-11 12:54:50 -08:00 |
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Jerry Zhao
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0190da20f0
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Update documentation source pointers
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2023-02-11 12:48:40 -08:00 |
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Harrison Liew
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e4b35f45fa
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Merge branch 'main' into new-hammer
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2023-02-10 12:55:41 -08:00 |
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Harrison Liew
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83764d3329
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[skip ci] add power-rtl and power-syn targets
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2023-02-09 13:01:08 -08:00 |
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Harrison Liew
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ea65d93c8e
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[skip ci] remove need to set site_packages_dir
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2023-02-09 10:18:24 -08:00 |
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Harrison Liew
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2680f552cf
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[skip ci] trying ENABLE_CUSTOM_FIRRTL_PASS=1 for Yosys, clarify init script for private tech plugins
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2023-02-06 12:31:39 -08:00 |
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Harrison Liew
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a6342ced21
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[skip ci] update some docs, merge VLSI_RTL and VLSI_BB into one
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2023-02-06 12:31:00 -08:00 |
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Harrison Liew
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48539353b0
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Makefile fixes, but sim still doesn't work
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2023-02-06 12:29:29 -08:00 |
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Harrison Liew
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1dcc7bd9f5
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use pip within conda, update docs + links
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2023-02-06 12:29:29 -08:00 |
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Jerry Zhao
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11a4796731
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Advise riscv-tools for gemmini users in docs
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2023-02-05 09:13:46 -08:00 |
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Jerry Zhao
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e732fdf130
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Merge pull request #1307 from ucb-bar/spiketile
Spike-as-a-Tile
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2023-02-01 23:05:30 -08:00 |
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joonho hwangbo
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db31427079
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Sync docs with CIRCT changes (#1312)
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2023-01-17 16:14:09 -08:00 |
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Jerry Zhao
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65bad16ef4
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Add brief text on spike-as-a-tile to docs:
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2023-01-17 11:07:28 -08:00 |
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joey0320
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e8e0f3e902
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Fix HARNESS_* to MODEL_* for consistence
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2023-01-09 10:36:08 -08:00 |
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abejgonzalez
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292cc753ce
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Run pre-commit on all files
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2022-12-21 15:59:46 -08:00 |
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abejgonzalez
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5996ec69a5
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Rework build-setup | Add single-node CI
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2022-12-09 17:33:41 -08:00 |
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PisonJay
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757d354410
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Fix typo in Initial-Repo-Setup.rst (#1269)
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2022-11-15 13:27:38 -08:00 |
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joonho hwangbo
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33f5040b5d
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Integrate Mempress memory tester (#1253)
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2022-10-17 18:41:39 -07:00 |
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Jerry Zhao
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fb2f83b90c
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Merge pull request #1252 from ucb-bar/fsdb
Default VCS simulators should generate FSDB
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2022-10-16 14:15:40 -07:00 |
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Michael Ren
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8ffb448009
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Add run-binary-debug option to waveform docs
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2022-10-13 01:43:08 -07:00 |
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Jerry Zhao
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d83ba0c19b
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Switch to default generating FSDB
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2022-10-10 16:20:14 -07:00 |
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Abraham Gonzalez
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f2c5f08f54
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Update conf.py
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2022-10-06 12:53:19 -05:00 |
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Abraham Gonzalez
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70f096a34a
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Remove extra logger call
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2022-10-06 12:41:49 -05:00 |
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Abraham Gonzalez
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fe3b4f2600
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Update stable docs
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2022-10-06 12:24:36 -05:00 |
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