wu-arch/chipyard
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222 Commits

Author SHA1 Message Date
Richard Yan
ae427a8a2d vlsi changes 2024-09-22 01:15:38 -07:00
Hansung Kim
8b9fee03bb vlsi: Add make_syn_f.sh to VLSI_RTL target 
This script appends Vortex verilog sources & reorders compilation order to
synthesis input config.
 2024-07-30 08:05:32 -07:00
Richard Yan
749b61d4b9 Merge branch 'graphics' of https://github.com/hansungk/chipyard into graphics 2024-07-21 00:03:04 -07:00
Richard Yan
8518e33831 syn and power yamls 2024-07-20 23:57:49 -07:00
Hansung Kim
2c390cd493 Merge remote-tracking branch 'upstream/main' into graphics 
rocket-chip not yet merged
 2024-06-27 16:32:32 -07:00
Richard Yan
ff484f7972 power flow makefiles 2024-06-09 15:33:04 -07:00
Nayiri
3a6677bc30 Fix clock name and macro paths for Sky130 VLSI flow (#1882) 2024-05-19 17:54:47 -07:00
Richard Yan
a18c5de271 Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-bar-main 2024-05-15 23:22:20 -07:00
Jerry Zhao
39092e9b00 Switch RTL-sim/FPGA/VLSI flows to chisel6 2024-05-13 12:48:06 -07:00
Richard Yan
81847ae775 sram flow & firesim flow 2024-05-07 14:39:45 -07:00
Richard Yan
d0b274ab78 Merge branch 'main' of https://github.com/ucb-bar/chipyard into ucb-bar-main 2024-04-20 02:03:35 -07:00
Richard Yan
e75c77a08a synthesizable radiance 2024-04-17 18:22:44 -07:00
Jerry Zhao
39f28aeaac Append EXT_FILELISTS to VLSI deps 2024-03-20 13:57:04 -07:00
Richard Yan
fd5fa7b6e1 Merge branch 'main' of https://github.com/ucb-bar/chipyard into graphics 2024-02-02 16:28:55 -08:00
Øyvind Harboe
99d82673d2 vlsi/Makefile: truncate file SRAM_GENERATOR_CONF 
previously the target would append, not truncate
the file, which could lead to duplicate yaml entries
in that file when the target was re-run.
 2024-02-01 07:33:47 +01:00
Hansung Kim
44df3be965 gitignore rundir in vlsi 2024-01-29 15:48:30 -08:00
Jerry Zhao
4d928c3c14 Rename timeout_cycles to TIMEOUT_CYCLES to match convention 2023-12-18 13:47:48 -08:00
Nayiri
42622919cd fixing macro paths for yosys with circt generated verilog [skip ci] 2023-12-14 18:02:32 -08:00
abejgonzalez
088e9ea45a Remove references to ENABLE_YOSYS 2023-12-13 10:07:14 -08:00
Nayiri
700057d9eb changed chiptop dut name, set FSDB=1 when needed 2023-11-13 13:33:24 -08:00
Jerry Zhao
77ee5906e2 [vlsi][ci skip] Fix INPUT_CONFS override in tutorial.mk 2023-10-19 11:19:56 -07:00
Jerry Zhao
e148a32e6b Merge pull request #1514 from ucb-bar/klayout-docs 
KLayout section of Sky130+OpenROAD tutorial
 2023-09-05 11:41:09 -07:00
abejgonzalez
c7f1fe220d Enable precommit | Format files 2023-08-28 14:56:55 -07:00
Jerry Zhao
6f90102770 Merge branch 'main' into klayout-docs 2023-07-10 09:21:18 -07:00
Nayiri K
222059941e renamed clock_clock to clock_uncore_clock 2023-06-30 15:04:38 -07:00
Nayiri K
dcaca02e14 small fixes for sim yaml generation 2023-06-30 15:04:04 -07:00
Nayiri K
5f54876de2 PREPROC_DEFINES renamed to SIM_PREPROC_DEFINES 2023-06-29 13:40:44 -07:00
Nayiri K
20d6bf059f changing clock name from clock_clock to clock_uncore_clock 2023-06-23 13:13:56 -07:00
nayiri-k
1de26550e4 small fix for #1508 2023-06-14 11:47:04 -07:00
nayiri-k
c7923d8899 use klayout for sky130-openroad tutorial, update conda install directions so that openroad/klayout installs don't fail 2023-06-08 14:56:42 -07:00
Abraham Gonzalez
c1ad70c10f Merge pull request #1375 from ucb-bar/use-fat-jar 
Use fat jar's to remove SBT invocations
 2023-05-26 17:03:42 -07:00
abejgonzalez
b65d8ef6c6 Have global location to store jar files (avoid issue with sbt assembly caching) 2023-05-26 13:14:06 -07:00
Jerry Zhao
4da1dea50f Support multi-binary-run in RTL sim 2023-05-24 16:48:18 -07:00
abejgonzalez
2997cddc0e Merge remote-tracking branch 'origin/main' into bump-verilator 2023-05-09 13:27:13 -07:00
joey0320
a5bf60c0f1 oops 2023-04-29 21:32:00 -07:00
joey0320
3f80507ce4 rm split-bb-files.py 2023-04-29 18:21:48 -07:00
joey0320
9ce0467bd3 fixes 2023-04-20 14:26:38 -07:00
Harrison Liew
9ef3001ce1 Remove Cadence & Synopsys plugins (#1410) 
* remove Cadence & Synopsys plugins from docs and scripts

* update conda-locks
 2023-03-21 09:34:38 -07:00
abejgonzalez
dc0c6e62f1 Merge remote-tracking branch 'origin/main' into bump-verilator 2023-03-14 14:20:10 -07:00
Nayiri K
454d619dfc improved tutorial makefile [skip ci] 2023-03-13 22:50:43 -07:00
abejgonzalez
95349755b5 Support TestDriver.v as top 2023-03-13 11:11:23 -07:00
Nayiri Krzysztofowicz
dd7e221a45 changing tutorial VLSI_TOP to RocketTile to save time 2023-03-12 19:04:14 -07:00
Nayiri Krzysztofowicz
3b1530402f Merge branch 'vlsi-tutorial' of https://github.com/ucb-bar/chipyard into openroad 2023-03-12 12:29:07 -07:00
Nayiri K
180f52ed35 bumping hammer-cadence-plugins 2023-03-10 23:20:40 -08:00
Nayiri K
0f326ae980 floorplan for openroad flow is different from commercial flow bc of srams 2023-03-10 23:18:20 -08:00
Nayiri Krzysztofowicz
47f84e97b4 Merge branch 'main' of https://github.com/ucb-bar/chipyard into vlsi-tutorial 2023-03-10 15:59:13 -08:00
Nayiri K
39260ac02e Merge branch 'openroad' of https://github.com/ucb-bar/chipyard into openroad 2023-03-10 15:20:10 -08:00
Nayiri K
6dba66f56c updated tutorial configuration files [skip ci] 2023-03-10 15:19:47 -08:00
Harrison Liew
a8c9c8271e Merge pull request #1369 from ucb-bar/sim-syn-par-fix 2023-03-10 15:09:58 -08:00
Nayiri K
81e11ee8e0 updating macro paths for asap7 tutorial to match new SRAM paths after rocket/chisel bump 2023-03-10 15:09:15 -08:00